JPH0533533B2 - - Google Patents
Info
- Publication number
- JPH0533533B2 JPH0533533B2 JP61043226A JP4322686A JPH0533533B2 JP H0533533 B2 JPH0533533 B2 JP H0533533B2 JP 61043226 A JP61043226 A JP 61043226A JP 4322686 A JP4322686 A JP 4322686A JP H0533533 B2 JPH0533533 B2 JP H0533533B2
- Authority
- JP
- Japan
- Prior art keywords
- bump
- bonding
- plating layer
- aluminum pad
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 26
- 238000007747 plating Methods 0.000 claims description 23
- 229910052759 nickel Inorganic materials 0.000 claims description 13
- 230000003746 surface roughness Effects 0.000 claims description 13
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 12
- 229910052737 gold Inorganic materials 0.000 claims description 12
- 239000010931 gold Substances 0.000 claims description 12
- 229910052782 aluminium Inorganic materials 0.000 description 21
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 21
- 239000010410 layer Substances 0.000 description 15
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 9
- 229910052802 copper Inorganic materials 0.000 description 7
- 239000010949 copper Substances 0.000 description 7
- 239000000853 adhesive Substances 0.000 description 5
- 239000000758 substrate Substances 0.000 description 5
- 230000001070 adhesive effect Effects 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000000956 alloy Substances 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000011889 copper foil Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000001590 oxidative effect Effects 0.000 description 2
- 239000004642 Polyimide Substances 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000003486 chemical etching Methods 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 239000002245 particle Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000004439 roughness measurement Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Description
〔産業上の利用分野〕
本発明はバンプ付き基板によるテープキヤリア
方式の回路基板構造に関する。
〔発明の概要〕
本発明はバンプ付き基板によるテープキヤリア
方式の回路基板構造において、その回路基板のフ
インガーリード先端に位置し、かつ集積回路素子
のアルミパツドに対向した位置に設けられたバン
プにつき、その表面の面粗度を５〜15μｍにする
ことにより、集積回路素子のアルミパツドとの接
合性を安定化したものである。
〔従来技術〕
従来のバンプ付き基板によるテープキヤリア方
式の回路基板構造は、第２図にその断面を示すよ
うに、４のフインガーリードに、５で示すような
凹状のネツク部を設けることにより、６のような
突起すなわちバンプを形成している。そしてバン
プ６の表面８すなわち集積回路素子と接合される
面については、その面粗度が3μｍ以下の平滑な
状態を用いていた。
〔発明の解決しようとする問題点〕
しかし、前述の従来技術では、集積回路素子の
アルミパツドと接合させる際に、特にアルミパツ
ドの表面酸化膜が比較的厚くなつている場合に
は、接合が不安定で、強度が出ない、あるいは接
合しないといつた状態に至る場合があるという問
題点を有する。そこで本発明はこのような問題点
を解決するものであり、その目的とするところ
は、集積回路素子のアルミパツドと安定して接合
可能なバンプ付き基板構造を提供するところにあ
る。
〔問題を解決するための手段〕
本発明の回路基板構造は、基板表面に配置され
るフインガーリードに集積回路素子が接合される
回路基板構造において、前記フインガーリードは
前記集積回路素子のパツドと対向する位置に形成
される突起状のバンプと、前記バンプの表面に形
成されるニツケルメツキ層と、前記ニツケルメツ
キ層の表面に形成される金メツキ層とを有し、前
記バンプの前記パツドと対向する表面が面粗度５
〜15μｍに形成されてなることを特徴とする。
〔作用〕
本発明の上記の構成によれば、ICチツプのア
ルミパツドとの接合の際に、基板バンプ表面の粗
い凸部が、アルミパツド表面にくい込みつつ変形
することにより、アルミパツド表面の酸化膜を効
率的に破壊し、アルミパツド内部の清浄な金属面
と基板バンプ金属とが、容易に合金を形成し、強
固な接合を得ることが可能となる。
特に5μｍ以上の面粗度において、前記の酸化
膜破壊効果が大きく、接合強度及び接合歩留りの
点で優れている。ただし、15μｍを越える面粗度
とすると、バンプ６の凹凸の谷の部分におけるフ
インガーリードの厚みが、かなり薄くなり、フイ
ンガーリード自体の破壊強度が、接合強度に比較
して極めて弱くなつてしまうため問題がある。
したがつて、総合的にみて５〜15μｍの面粗度
とした場合が、最も品質的に優れている。
〔実施例〕
第１図は本発明の実施例における主要断面図で
あつて、１はポリイミド等の基板ベースフイル
ム、２は接着層、３は導体パターン、４はフイン
ガーリード、５はフインガーリードの凹部であ
り、６はフインガーリードのバンプ部、７はバン
プの接合面であり、この面は銅素材にニツケルメ
ツキ及びさらにその上に金メツキが施こされてお
り、この接合面の面粗度が約9μｍであることが
特徴である。
一方、第２図は従来の実施例における主要断面
図であり、８で示すバンプ部接合面は、面粗度が
約3μｍ以下となつている。
第１図の本発明のフインガーリード４は厚み約
35μｍ、幅約60μｍであり、凹部５の深さは約15μ
ｍであり、バンプ６は厚み約35μｍ、幅約60μｍ、
長さ約60μｍである。バンプ接合面７は、銅素材
上にニツケルメツキ約1μｍ、その上に金メツキ
約1μｍの構成となつており、その面粗度は約9μ
ｍである。その面粗度測定データを第４図に示
す。この約9μｍの粗さの形成方法に関しては、
第１に第１図に示す本実施例の場合のように、１
の回路基板ベースフイルム側に向う方向に、バン
プ接合面７を設ける場合においては、導体パター
ン３の接着層２との接着面１２の粗さを、化学研
磨等を施して除去すること無く、そのまま用い
て、その面の上にニツケル及び金メツキを施して
用いる。すなわち、接着面１２は、銅箔製造時に
おいて、接着層２との接着力を増す目的で、電解
銅メツキによる析出粒子にて、粗化してあるため
である。また第２として、バンプ接合面７を１の
回路基板ベースフイルム側と反対方向に形成する
場合においては、非接着面１３は銅箔製造時に
は、3μｍ以下であるため、化学エツチングによ
り粗化してから、ニツケル及び金メツキを施して
用いる。
このような本発明による回路基板構造を用いれ
ば、第３図に示すように、ICチツプのアルミパ
ツドと、基板のフインガーリード上のバンプとを
一括接合させる際に、次のような作用により、互
いに強固な接合状態を安定して得ることができ
る。
まず、ICチツプ９のアルミパツド１０と、基
板の対応するフインガーリード上のバンプ６とを
位置合わせする。次に、ヒーターツールにより、
フインガーリードのバンプ６をICチツプ９に押
しつけ、フインガーリード上のバンプ接合面７を
アルミパツド１０に接触させて、加圧、加熱す
る。加圧は１バンプあたり約100ｇ、加熱はヒー
ターツール温度で約500℃、時間は１〜２秒であ
る。この時において、初めに基板バンプ表面の粗
い実起がICチツプのアルミパツドにくさび状に
くい込み、そしてヒーターツールの圧力により、
基板バンプの粗い突起が押しつぶされ、加圧方向
と垂直方向にふくらむ状態にて変形することによ
り、アルミパツド表面のアルミ酸化膜を非常に効
率的に破壊排除し、アルミパツド内部のアルミの
清浄な面を安定して露出させることができる。こ
れにより、加熱，加圧環境のもとにおいて、基板
バンプの金属とアルミとが容易に反応し、十分な
合金を形成して、強固な接合を得ることができ
る。結果として、接合強度としては、従来の場合
は、平均14.6ｇ、標準偏差5.4ｇであるのに対し、
本発明の場合には、平均22.1ｇ、標準偏差4.1ｇ
と約50％アツプとなり、また接合歩留りとして
も、従来の場合は80％程度であるのに対し、本発
明の場合は99％以上となる。ただし、ここでいう
接合強度とは、第３図において、ICチツプを接
合したフインガーリードの凹部５に測定器の端子
を引つかけて、接合部を剥離する方向すなわち図
面上上方へ引つ張つた時の破壊強度であり、接合
部が破壊する場合とフインガーリード自体あるい
はICチツプ自体が破壊する場合とがある。
次に、バンプ接合面７の面粗度の変化に対する
接合強度及び接合歩留りの詳しいデータを第１表
に示す。
[Industrial Field of Application] The present invention relates to a tape carrier type circuit board structure using a bumped board. [Summary of the Invention] The present invention relates to a tape carrier type circuit board structure using a board with bumps, and a bump provided at the tip of a finger lead of the circuit board and facing an aluminum pad of an integrated circuit element. By setting the surface roughness to 5 to 15 μm, the bondability with the aluminum pad of the integrated circuit element is stabilized. [Prior Art] The conventional tape carrier type circuit board structure using a board with bumps, as shown in the cross section of Fig. , 6 are formed. As for the surface 8 of the bump 6, that is, the surface to be bonded to the integrated circuit element, a smooth surface with a surface roughness of 3 μm or less was used. [Problems to be Solved by the Invention] However, with the above-mentioned conventional technology, when bonding to an aluminum pad of an integrated circuit element, the bonding becomes unstable, especially when the surface oxide film of the aluminum pad is relatively thick. However, there is a problem in that the strength may not be obtained or a state may be reached when the bond is not bonded. SUMMARY OF THE INVENTION The present invention is intended to solve these problems, and its purpose is to provide a bumped substrate structure that can be stably bonded to an aluminum pad of an integrated circuit element. [Means for Solving the Problem] The circuit board structure of the present invention is a circuit board structure in which an integrated circuit element is bonded to finger leads arranged on the surface of the board, in which the finger leads are bonded to pads of the integrated circuit element. a protruding bump formed at a position facing the bump, a nickel plating layer formed on the surface of the bump, and a gold plating layer formed on the surface of the nickel plating layer, and facing the pad of the bump. surface has a surface roughness of 5
It is characterized by being formed to a thickness of ~15 μm. [Function] According to the above structure of the present invention, when an IC chip is bonded to an aluminum pad, the rough convex portion on the surface of the substrate bump deforms while digging into the surface of the aluminum pad, thereby effectively removing the oxide film on the surface of the aluminum pad. The clean metal surface inside the aluminum pad and the substrate bump metal easily form an alloy, making it possible to obtain a strong bond. In particular, when the surface roughness is 5 μm or more, the above-mentioned oxide film destruction effect is large, and the bonding strength and bonding yield are excellent. However, if the surface roughness exceeds 15 μm, the thickness of the finger leads at the valleys of the bumps 6 becomes considerably thinner, and the breaking strength of the finger leads themselves becomes extremely weak compared to the bonding strength. There is a problem because it is stored away. Therefore, overall, a surface roughness of 5 to 15 μm provides the best quality. [Embodiment] FIG. 1 is a main cross-sectional view of an embodiment of the present invention, in which 1 is a substrate base film made of polyimide or the like, 2 is an adhesive layer, 3 is a conductive pattern, 4 is a finger lead, and 5 is a finger lead. This is the concave part of the lead, 6 is the bump part of the finger lead, and 7 is the bonding surface of the bump.This surface is made of copper material with nickel plating and gold plating on top. It is characterized by a roughness of approximately 9 μm. On the other hand, FIG. 2 is a main sectional view of a conventional embodiment, and the bump portion bonding surface indicated by 8 has a surface roughness of about 3 μm or less. The finger lead 4 of the present invention shown in FIG. 1 has a thickness of approximately
35μm, width approximately 60μm, and depth of recess 5 is approximately 15μm.
m, and the bump 6 has a thickness of approximately 35 μm, a width of approximately 60 μm,
The length is approximately 60 μm. The bump bonding surface 7 has a copper material with nickel plating of about 1 μm and gold plating on top of about 1 μm, and the surface roughness is about 9 μm.
It is m. Figure 4 shows the surface roughness measurement data. Regarding the method of forming this roughness of approximately 9 μm,
First, as in the case of this embodiment shown in FIG.
When providing the bump bonding surface 7 in the direction facing the circuit board base film side, the roughness of the bonding surface 12 of the conductor pattern 3 with the adhesive layer 2 can be left as is without being removed by chemical polishing or the like. It is used by applying nickel and gold plating to the surface. That is, this is because the adhesive surface 12 is roughened with particles deposited by electrolytic copper plating in order to increase the adhesive force with the adhesive layer 2 during the manufacture of the copper foil. Second, when the bump bonding surface 7 is formed in the opposite direction to the circuit board base film side in 1, the non-adhesive surface 13 is 3 μm or less in thickness when the copper foil is manufactured, so it must be roughened by chemical etching. , nickel and gold plated. If the circuit board structure according to the present invention is used, as shown in FIG. 3, when the aluminum pad of the IC chip and the bumps on the finger leads of the board are bonded together, the following effects will be achieved. A mutually strong bonded state can be stably obtained. First, the aluminum pad 10 of the IC chip 9 and the bump 6 on the corresponding finger lead of the board are aligned. Next, with the heater tool,
The bump 6 of the finger lead is pressed against the IC chip 9, and the bump joint surface 7 on the finger lead is brought into contact with the aluminum pad 10, and then pressurized and heated. The pressure was about 100 g per bump, the heating was about 500°C at a heater tool temperature, and the time was 1 to 2 seconds. At this time, the rough spots on the surface of the board bumps first become wedged into the aluminum pad of the IC chip, and then due to the pressure of the heater tool,
The rough protrusions of the board bumps are crushed and deformed by expanding in the direction perpendicular to the direction of pressure, which destroys and removes the aluminum oxide film on the surface of the aluminum pad very efficiently, and removes the clean aluminum surface inside the aluminum pad. It can be exposed stably. This allows the metal of the substrate bump to easily react with aluminum in a heated and pressurized environment, forming a sufficient alloy to obtain a strong bond. As a result, the bonding strength was 14.6g on average and 5.4g with standard deviation in the conventional case.
In the case of the present invention, the average is 22.1 g and the standard deviation is 4.1 g.
The bonding yield increases by about 50%, and the bonding yield is about 80% in the conventional case, whereas it is over 99% in the case of the present invention. However, the bonding strength referred to here refers to the bonding strength shown in Fig. 3 when the terminal of the measuring device is hooked to the concave portion 5 of the finger lead to which the IC chip is bonded, and pulled in the direction in which the bonded portion is peeled off, that is, upward in the drawing. This is the breaking strength when stretched, and there are cases where the joint part breaks, and cases where the finger lead itself or the IC chip itself breaks. Next, detailed data on bonding strength and bonding yield with respect to changes in surface roughness of bump bonding surface 7 are shown in Table 1.
バンプの表面に特性の異なる２種類のメツキ層
を、即ち、ニツケルメツキ層と金メツキ層とを積
層すると共にその面粗度を５〜15μｍとする構成
としたので、バンプの表面に形成された硬度の高
いニツケルメツキ層により、例えば、硬度の低い
銅からなるバンプ表面の素地の凹凸面が補強され
ると共に、集積回路素子のアルミパツドとの接合
時にその凹凸状態が維持できることから、接合時
において、バンプはアルミパツドの表面に形成さ
れている絶縁性の酸化膜を破壊して内部の清浄な
面と確実に接触できる、加えて、ニツケルメツキ
層の表面には硬度の低い金メツキ層を形成してい
るので、ニツケルメツキ層表面の凸部の金メツキ
層が塑性変形して凹部に移動することから、バン
プとアルミパツドとの接合強度及び安定性が著し
く向上できる、また、ニツケルメツキ層の介在は
銅と金との拡散を防ぐバリア層としても寄与する
ので、金メツキ層の表面に銅が拡散してきて酸化
し、接合性を妨げてしまうという課題も回避でき
る、という顕著な効果を有する。
Two types of plating layers with different properties, namely a nickel plating layer and a gold plating layer, are laminated on the surface of the bump, and the surface roughness is 5 to 15 μm, so the hardness formed on the bump surface is A nickel plating layer with a high hardness, for example, reinforces the uneven surface of the bump surface made of copper, which has low hardness, and maintains the uneven state when bonding to the aluminum pad of an integrated circuit element. It destroys the insulating oxide film formed on the surface of the aluminum pad and makes sure it comes into contact with the clean surface inside.In addition, a gold plating layer with low hardness is formed on the surface of the nickel plating layer. Since the gold plating layer in the convex parts of the surface of the nickel plating layer is plastically deformed and moves to the concave parts, the bonding strength and stability between the bump and the aluminum pad can be significantly improved.Also, the interposition of the nickel plating layer is due to the diffusion of copper and gold. Since it also serves as a barrier layer to prevent copper from oxidizing and diffusing into the surface of the gold plating layer, it has the remarkable effect of avoiding the problem of copper diffusing into the surface of the gold plating layer and oxidizing it, which would impede bonding properties.
第１図は本発明の回路基板構造の一実施例を示
す主要断面図。第２図は従来の回路基板構造を示
す主要断面図。第３図は本発明の回路基板を用い
たICチツプでの実装構造を示す断面図。第４図
は本発明のバンプ接合面の面粗度データ図。
１……回路基板ベースフイルム、２……接着
層、３……導体パターン、４……フインガーリー
ド、５……フインガーリード凹部、６……フイン
ガーリードバンプ部、７……バンプ接合面、８…
…従来のバンプ接合面、９……ICチツプ、１０
……ICチプのアルミパツド、１１……ICチツプ
のパシベーシヨン膜、１２……接着面、１３……
非接着面。
FIG. 1 is a main sectional view showing an embodiment of the circuit board structure of the present invention. FIG. 2 is a main sectional view showing a conventional circuit board structure. FIG. 3 is a sectional view showing a mounting structure of an IC chip using the circuit board of the present invention. FIG. 4 is a surface roughness data diagram of the bump bonding surface of the present invention. DESCRIPTION OF SYMBOLS 1... Circuit board base film, 2... Adhesive layer, 3... Conductor pattern, 4... Finger lead, 5... Finger lead recess, 6... Finger lead bump portion, 7... Bump bonding surface , 8...
...Conventional bump bonding surface, 9...IC chip, 10
... Aluminum pad of IC chip, 11 ... Passivation film of IC chip, 12 ... Adhesive surface, 13 ...
Non-adhesive surface.
Claims (1)
積回路素子が接合される回路基板構造において、
前記フインガーリードは前記集積回路素子のバツ
ドと対向する位置に形成される突起状のバンプ
と、前記バンプの表面に形成されるニツケルメツ
キ層と、前記ニツケルメツキ層の表面に形成され
る金メツキ層とを有し、前記バンプの前記パツド
と対向する表面が面粗度５〜15μｍに形成されて
なることを特徴とする回路基板構造。1. In a circuit board structure in which integrated circuit elements are bonded to finger leads arranged on the surface of the board,
The finger leads include a protruding bump formed at a position facing the butt of the integrated circuit element, a nickel plating layer formed on the surface of the bump, and a gold plating layer formed on the surface of the nickel plating layer. A circuit board structure characterized in that a surface of the bump facing the pad is formed to have a surface roughness of 5 to 15 μm.
Priority Applications (8)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61043226A JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
| US07/017,419 US4786545A (en) | 1986-02-28 | 1987-02-24 | Circuit substrate and method for forming bumps on the circuit substrate |
| GB8704425A GB2187331B (en) | 1986-02-28 | 1987-02-25 | Method of forming an integrated circuit assembly or part thereof |
| GB8901825A GB2211351B (en) | 1986-02-28 | 1989-01-27 | Method of forming an integrated circuit assembly or part thereof |
| SG1492A SG1492G (en) | 1986-02-28 | 1992-01-08 | Method of forming an integrated circuit assembly or part thereof |
| SG1392A SG1392G (en) | 1986-02-28 | 1992-01-08 | Method of forming an integrated circuit assembly or part thereof |
| HK35993A HK35993A (en) | 1986-02-28 | 1993-04-15 | Method of forming an integrated circuit assembly or part thereof |
| HK36093A HK36093A (en) | 1986-02-28 | 1993-04-15 | Method of forming an integrated circuit assembly or part thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61043226A JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS62200738A JPS62200738A (en) | 1987-09-04 |
| JPH0533533B2 true JPH0533533B2 (en) | 1993-05-19 |
Family
ID=12657998
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61043226A Granted JPS62200738A (en) | 1986-02-28 | 1986-02-28 | Circuit substrate structure |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62200738A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2606606B2 (en) * | 1994-10-14 | 1997-05-07 | 日本電気株式会社 | Method for manufacturing semiconductor device |
| KR19980044255A (en) * | 1996-12-06 | 1998-09-05 | 황인길 | Lead Finger Structure of Flip Chip Substrate |
| JP4222703B2 (en) * | 2000-01-28 | 2009-02-12 | Ｎｅｃエレクトロニクス株式会社 | Semiconductor device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52124865A (en) * | 1976-04-13 | 1977-10-20 | Sharp Corp | Semiconductor device |
| JPS55138864A (en) * | 1979-04-16 | 1980-10-30 | Sharp Corp | Method of fabricating semiconductor assembling substrate |
| JPS55140238A (en) * | 1979-04-20 | 1980-11-01 | Hitachi Ltd | Tape carrier type semiconductor device |
-
1986
- 1986-02-28 JP JP61043226A patent/JPS62200738A/en active Granted
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS52124865A (en) * | 1976-04-13 | 1977-10-20 | Sharp Corp | Semiconductor device |
| JPS55138864A (en) * | 1979-04-16 | 1980-10-30 | Sharp Corp | Method of fabricating semiconductor assembling substrate |
| JPS55140238A (en) * | 1979-04-20 | 1980-11-01 | Hitachi Ltd | Tape carrier type semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS62200738A (en) | 1987-09-04 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |