SG1492G - Method of forming an integrated circuit assembly or part thereof - Google Patents

Method of forming an integrated circuit assembly or part thereof

Info

Publication number
SG1492G
SG1492G SG1492A SG1492A SG1492G SG 1492 G SG1492 G SG 1492G SG 1492 A SG1492 A SG 1492A SG 1492 A SG1492 A SG 1492A SG 1492 G SG1492 G SG 1492G
Authority
SG
Singapore
Prior art keywords
forming
integrated circuit
circuit assembly
assembly
integrated
Prior art date
Application number
SG1492A
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61043226A external-priority patent/JPS62200738A/en
Priority claimed from JP5442486A external-priority patent/JPS62211930A/en
Priority claimed from JP61277488A external-priority patent/JPS63129635A/en
Priority claimed from GB8704425A external-priority patent/GB2187331B/en
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Publication of SG1492G publication Critical patent/SG1492G/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4839—Assembly of a flat lead with an insulating support, e.g. for TAB
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01057—Lanthanum [La]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
SG1492A 1986-02-28 1992-01-08 Method of forming an integrated circuit assembly or part thereof SG1492G (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP61043226A JPS62200738A (en) 1986-02-28 1986-02-28 Circuit substrate structure
JP5442486A JPS62211930A (en) 1986-03-12 1986-03-12 Method of producing projection of substrate conductor layer
JP61277488A JPS63129635A (en) 1986-11-20 1986-11-20 Substrate with bump
GB8704425A GB2187331B (en) 1986-02-28 1987-02-25 Method of forming an integrated circuit assembly or part thereof

Publications (1)

Publication Number Publication Date
SG1492G true SG1492G (en) 1992-03-20

Family

ID=27449891

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1492A SG1492G (en) 1986-02-28 1992-01-08 Method of forming an integrated circuit assembly or part thereof

Country Status (2)

Country Link
GB (1) GB2211351B (en)
SG (1) SG1492G (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4209355A (en) * 1978-07-26 1980-06-24 National Semiconductor Corporation Manufacture of bumped composite tape for automatic gang bonding of semiconductor devices

Also Published As

Publication number Publication date
GB8901825D0 (en) 1989-03-15
GB2211351A (en) 1989-06-28
GB2211351B (en) 1990-03-21

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