JPS62182791A - Crt refresh system using double vram - Google Patents
Crt refresh system using double vramInfo
- Publication number
- JPS62182791A JPS62182791A JP2452886A JP2452886A JPS62182791A JP S62182791 A JPS62182791 A JP S62182791A JP 2452886 A JP2452886 A JP 2452886A JP 2452886 A JP2452886 A JP 2452886A JP S62182791 A JPS62182791 A JP S62182791A
- Authority
- JP
- Japan
- Prior art keywords
- vram
- crt
- refresh
- double
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 4
- 230000009977 dual effect Effects 0.000 claims description 3
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 12
- 238000010586 diagram Methods 0.000 description 2
- 240000002853 Nelumbo nucifera Species 0.000 description 1
- 235000006508 Nelumbo nucifera Nutrition 0.000 description 1
- 235000006510 Nelumbo pentapetala Nutrition 0.000 description 1
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、ワークステーションに関し、特に、ＣＲＴ
リフレッシュ方式に関する。DETAILED DESCRIPTION OF THE INVENTION FIELD OF INDUSTRIAL APPLICATION The present invention relates to workstations, and in particular to CRTs.
Regarding the refresh method.
従来の技術
従来、この種のＶＲＡＭにおいては、ＣＲＴをリフレッ
シュするためＣＲＴコントローラに一定時間毎にアクセ
スされ、この間をぬってＣＰＵや他のプロセッサからア
クセスされていた。2. Description of the Related Art Conventionally, in this type of VRAM, a CRT controller is accessed at fixed time intervals in order to refresh the CRT, and during this time, the VRAM is accessed by a CPU or other processor.
発明が解決しようとする問題点
しかしなから、上述した従来のＶＲＡＭはＣＲＴのリフ
レッシュと描画が同時に行えないために、ＶＲＡＭに他
のＣＰＵ等のプロセッサかアクセスする場合には処理速
度の低下をまねくという欠点があった。Problems to be Solved by the Invention However, since the conventional VRAM mentioned above cannot refresh the CRT and draw at the same time, it causes a reduction in processing speed when the VRAM is accessed by another processor such as a CPU. There was a drawback.
本発明は従来の上記事情に鑑みてなされたものであり、
従って本発明は従来の技術に内在する上記欠点を解消す
ることを可能とした２重ＶＲＡＭを用いた新規なＣＲＴ
リフレッシュ方式を提供することにある。The present invention has been made in view of the above-mentioned conventional circumstances, and
Therefore, the present invention provides a novel CRT using dual VRAM that makes it possible to eliminate the above-mentioned drawbacks inherent in the conventional technology.
The purpose is to provide a refresh method.
問題点を解決するための手段
上記目的を達成する為に、本発明に係るＣＲＴ リフレ
ッシュ方式は、ＣＰＵ等のプロセッサからアクセスでき
るＶＲＡＭとは別にＣＲＴ リフレッシュ専用のＶＲＡ
Ｍを膏し、常時７ステムバスからのアクセスを許し空き
時間に描画用ＶＲＡＭからりフレッンユ専用ＶＲＡＭに
データの転送を行う制御回路とを具備して構成される。Means for Solving the Problems In order to achieve the above object, the CRT refresh method according to the present invention uses a VRA exclusively for CRT refresh, in addition to a VRAM that can be accessed from a processor such as a CPU.
The system is constructed with a control circuit that allows access from the 7-stem bus at all times and transfers data from the VRAM for drawing to the VRAM dedicated to Frequent during free time.
実施例
次に本発明をその好ましい一実施例について図面を参照
して具体的に説明する。Embodiment Next, a preferred embodiment of the present invention will be specifically explained with reference to the drawings.
第１図は本発明の一実施例を示すブｏ ’ｙり構成図で
ある。図において、参照番号１は＄り御回路、２は描画
用ＶＲＡＭ、３はＣＲＴ リフ Ｌ／ −、／、専用Ｖ
ＲＡＭ、４はＣＲＴコントローラ、５はシステムハスを
それぞれ示す。本発明においては、ＶＲＡＭ２からＶＲ
ＡＭ３にデータを転送する制御回路１とＣＲＴを制御す
るＣＲＴコントローラ４との間にシステムバス５に接続
されＣＰＩＩ等のプロセッサから画面イメージが展開さ
れる描画用ＶＲＡＭ ２とＣＲＴ リフレンシュ専用の
ＶＲＡＭ３から成る２重のＶＲＡＭが設けられている。FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference number 1 is a $ control circuit, 2 is a VRAM for drawing, and 3 is a CRT riff L/-, /, dedicated V
4 represents a RAM, 4 represents a CRT controller, and 5 represents a system system. In the present invention, from VRAM2 to VR
It is connected to a system bus 5 between a control circuit 1 that transfers data to the AM 3 and a CRT controller 4 that controls the CRT, and consists of a drawing VRAM 2 in which a screen image is developed from a processor such as CPII, and a VRAM 3 dedicated to CRT refresh. Dual VRAM is provided.
発明の詳細
な説明したように、本発明によれば、リフレ、／ユ専用
のＶＲＡＭを持ち、／ステムバスから送られてくるデー
タを空き時間を利用して転送することでＣＰＵ等のＶＲ
ＡＭアクセス中の待ち時間をなくすことにより、処理速
度を向上できる効果か得られる。As described in detail, the present invention has a dedicated VRAM for Refre, /U, and utilizes free time to transfer data sent from the /system bus to the VR of the CPU, etc.
By eliminating the waiting time during AM access, processing speed can be improved.
第１図は本発明の一実施例を示すブロック構成図である
。
１９１．制御回路、２． 、 、 ＶＲＡＭ、３９．。
ＶＲＡＭ、４． 、 、 ＣＲＴ コニ、’ ）ロー−
ｙ、５．、 、システムハスFIG. 1 is a block diagram showing one embodiment of the present invention. 191. control circuit, 2. , , VRAM, 39. . VRAM, 4. , , CRT Koni,') Low-
y, 5. , , system lotus
Claims (1)
続されＣＰＵ等のプロセッサから画面イメージを展開さ
れる描画用ＶＲＡＭと、この描画用ＶＲＡＭから前記リ
フレッシュ専用ＶＲＡＭに内容を転送する制御回路とを
有し、リフレッシュ中も描画を可能とすることを特徴と
した２重ＶＲＡＭを用いたＣＲＴリフレッシュ方式。It has a VRAM dedicated for CRT refresh, a drawing VRAM connected to a system bus and into which a screen image is developed from a processor such as a CPU, and a control circuit that transfers contents from this drawing VRAM to the refresh-only VRAM, and during refresh. A CRT refresh method using dual VRAM, which is characterized by the ability to draw images.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2452886A JPS62182791A (en) | 1986-02-06 | 1986-02-06 | Crt refresh system using double vram |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2452886A JPS62182791A (en) | 1986-02-06 | 1986-02-06 | Crt refresh system using double vram |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62182791A true JPS62182791A (en) | 1987-08-11 |
Family
ID=12140651
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2452886A Pending JPS62182791A (en) | 1986-02-06 | 1986-02-06 | Crt refresh system using double vram |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62182791A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003030251A (en) * | 2001-07-19 | 2003-01-31 | Fujitsu Ltd | Simulation system, method, program and recording medium |
-
1986
- 1986-02-06 JP JP2452886A patent/JPS62182791A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2003030251A (en) * | 2001-07-19 | 2003-01-31 | Fujitsu Ltd | Simulation system, method, program and recording medium |
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