JPS54118735A - Process state display method - Google Patents

Process state display method

Info

Publication number
JPS54118735A
JPS54118735A JP2540178A JP2540178A JPS54118735A JP S54118735 A JPS54118735 A JP S54118735A JP 2540178 A JP2540178 A JP 2540178A JP 2540178 A JP2540178 A JP 2540178A JP S54118735 A JPS54118735 A JP S54118735A
Authority
JP
Japan
Prior art keywords
computer
screen data
data
crt
display unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2540178A
Other languages
Japanese (ja)
Other versions
JPS6113255B2 (en
Inventor
Masahide Nomura
Masahiro Iwamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2540178A priority Critical patent/JPS54118735A/en
Publication of JPS54118735A publication Critical patent/JPS54118735A/en
Publication of JPS6113255B2 publication Critical patent/JPS6113255B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE: To reduce the load of the computer and thus to increase the process speed in case the screen data is tansferred to CRT from the computer for the CRT display unit which is used as the information exchange means between the operator and the process computer control system.
CONSTITUTION: In the system through which the picture data is transmitted to the CRT display unit from the computer and then displayed on CRT6, writing start position x and y to refresh memory 3 of the screen data from computer 1 plus the line and length M and N of the screen data are sent to interface controller 2 to be stored in the register. Then screen data D1, D2 ... DMXN are transferred to controller 2 from computer 1, and thus the display unit assembles these screen data into 2-dimensional data D11, D12 ... DMN based on the information stored in the controller. Thus, the picture is displayed on CRT based on these 2-dimensional data.
COPYRIGHT: (C)1979,JPO&Japio
JP2540178A 1978-03-08 1978-03-08 Process state display method Granted JPS54118735A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2540178A JPS54118735A (en) 1978-03-08 1978-03-08 Process state display method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2540178A JPS54118735A (en) 1978-03-08 1978-03-08 Process state display method

Publications (2)

Publication Number Publication Date
JPS54118735A true JPS54118735A (en) 1979-09-14
JPS6113255B2 JPS6113255B2 (en) 1986-04-12

Family

ID=12164874

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2540178A Granted JPS54118735A (en) 1978-03-08 1978-03-08 Process state display method

Country Status (1)

Country Link
JP (1) JPS54118735A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61256430A (en) * 1985-05-09 1986-11-14 Idec Izumi Corp Multi-function display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61256430A (en) * 1985-05-09 1986-11-14 Idec Izumi Corp Multi-function display device

Also Published As

Publication number Publication date
JPS6113255B2 (en) 1986-04-12

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