JPS6218052Y2 - - Google Patents
Info
- Publication number
- JPS6218052Y2 JPS6218052Y2 JP19458782U JP19458782U JPS6218052Y2 JP S6218052 Y2 JPS6218052 Y2 JP S6218052Y2 JP 19458782 U JP19458782 U JP 19458782U JP 19458782 U JP19458782 U JP 19458782U JP S6218052 Y2 JPS6218052 Y2 JP S6218052Y2
- Authority
- JP
- Japan
- Prior art keywords
- resin
- sealed
- chip
- lead
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H10W72/5449—
-
- H10W90/756—
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982194587U JPS5998650U (ja) | 1982-12-22 | 1982-12-22 | 樹脂封止型モジユ−ル |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1982194587U JPS5998650U (ja) | 1982-12-22 | 1982-12-22 | 樹脂封止型モジユ−ル |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5998650U JPS5998650U (ja) | 1984-07-04 |
| JPS6218052Y2 true JPS6218052Y2 (enExample) | 1987-05-09 |
Family
ID=30418200
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1982194587U Granted JPS5998650U (ja) | 1982-12-22 | 1982-12-22 | 樹脂封止型モジユ−ル |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5998650U (enExample) |
-
1982
- 1982-12-22 JP JP1982194587U patent/JPS5998650U/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5998650U (ja) | 1984-07-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH09162322A (ja) | 表面実装型半導体装置とその製造方法 | |
| KR100260102B1 (ko) | 기능 분화형 온도 보상 수정 발진기 및 그 제조 방법 | |
| JPH01303730A (ja) | 半導体素子の実装構造とその製造方法 | |
| JPS6218052Y2 (enExample) | ||
| JP2591152Y2 (ja) | 電子部品実装回路基板 | |
| JPS63213936A (ja) | 混成集積回路装置の製造方法 | |
| KR100337462B1 (ko) | 에어리어 어레이 범프드 반도체 패키지 몰딩금형 | |
| KR910000018B1 (ko) | 리이드프레임을 갖춘 반도체장치 및 그 제조방법 | |
| US20040021219A1 (en) | Method of mounting integrated circuit die in a package using a solder preform having isolatable portions | |
| JP2663986B2 (ja) | 高集積度半導体装置 | |
| JPH0447949Y2 (enExample) | ||
| JP2500610B2 (ja) | 半導体装置 | |
| JPH06132443A (ja) | 半導体装置およびその製造に用いられるリードフレーム | |
| KR100206941B1 (ko) | 버틈 리드 패키지 및 그 제조방법 | |
| JP3405718B2 (ja) | 半導体装置 | |
| JPS635254Y2 (enExample) | ||
| KR100195507B1 (ko) | 박형 반도체 칩 패키지 소자 | |
| JPH0281460A (ja) | Icチップ | |
| JPH0287654A (ja) | 表面実装型半導体装置 | |
| JPS63265418A (ja) | ヒューズ付きチップ状固体電解コンデンサおよび製造方法 | |
| JPH0536300Y2 (enExample) | ||
| JPS59204265A (ja) | 混成集積回路の製造方法 | |
| JPS6132558A (ja) | 半導体装置 | |
| JPS60256217A (ja) | 表面波フイルタ | |
| KR19990033645A (ko) | 피시비 패키지 및 그의 제조방법 |