JPS62170633U - - Google Patents
Info
- Publication number
- JPS62170633U JPS62170633U JP1986058811U JP5881186U JPS62170633U JP S62170633 U JPS62170633 U JP S62170633U JP 1986058811 U JP1986058811 U JP 1986058811U JP 5881186 U JP5881186 U JP 5881186U JP S62170633 U JPS62170633 U JP S62170633U
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- electrode
- semiconductor chip
- semiconductor device
- mounting board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 230000008018 melting Effects 0.000 claims 1
- 238000002844 melting Methods 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
Landscapes
- Wire Bonding (AREA)
Description
第１図は本考案の一実施例図であり、Ａは常温
の状態、Ｂは加熱時の状態を示す。また、第２図
は従来装置の一例図であり、Ａは常温の状態、Ｂ
は加熱時の状態を示す。 〈符号の説明〉、１…実装基板、２…半導体チ
ツプ、３…半導体チツプの電極、４…実装基板の
電極、５…バンプ。
の状態、Ｂは加熱時の状態を示す。また、第２図
は従来装置の一例図であり、Ａは常温の状態、Ｂ
は加熱時の状態を示す。 〈符号の説明〉、１…実装基板、２…半導体チ
ツプ、３…半導体チツプの電極、４…実装基板の
電極、５…バンプ。
Claims (1)
- 実装基板の電極と半導体チツプの電極とを対向
させ、半田からなるバンプを介して上記両電極を
接続する半導体装置の実装構造において、上記バ
ンプを溶融する際の上記実装基板と上記半導体チ
ツプとの熱膨張によつて生じる寸法差の分だけ予
め上記両電極をずらして形成し、上記溶融の際に
両電極が対向するようにしたことを特徴とする半
導体装置の実装構造。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986058811U JPS62170633U (ja) | 1986-04-21 | 1986-04-21 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1986058811U JPS62170633U (ja) | 1986-04-21 | 1986-04-21 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62170633U true JPS62170633U (ja) | 1987-10-29 |
Family
ID=30889718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1986058811U Pending JPS62170633U (ja) | 1986-04-21 | 1986-04-21 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62170633U (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62281343A (ja) * | 1986-05-29 | 1987-12-07 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置 |
| JP2012156374A (ja) * | 2011-01-27 | 2012-08-16 | Fujitsu Ltd | 基板の接続構造、基板セット、光センサアレイ装置及び基板を接続する方法 |
-
1986
- 1986-04-21 JP JP1986058811U patent/JPS62170633U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS62281343A (ja) * | 1986-05-29 | 1987-12-07 | Nippon Telegr & Teleph Corp <Ntt> | 半導体装置 |
| JP2012156374A (ja) * | 2011-01-27 | 2012-08-16 | Fujitsu Ltd | 基板の接続構造、基板セット、光センサアレイ装置及び基板を接続する方法 |