JPS59146960U - 混成集積回路 - Google Patents
混成集積回路Info
- Publication number
- JPS59146960U JPS59146960U JP1983041670U JP4167083U JPS59146960U JP S59146960 U JPS59146960 U JP S59146960U JP 1983041670 U JP1983041670 U JP 1983041670U JP 4167083 U JP4167083 U JP 4167083U JP S59146960 U JPS59146960 U JP S59146960U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- hybrid integrated
- heat sink
- conductive path
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
Landscapes
- Cooling Or The Like Of Electrical Apparatus (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
め要約のデータは記録されません。
Description
第1図は従来例を説明する上面図、第2図は第1図の■
−■線断面図、第3図は本考案を説明する上面図である
。 11は混成集積回路基板、12は導電路、13は固着パ
ッド、14はヒートシンク、15はパワー半導体素子、
16は拡張部である。
−■線断面図、第3図は本考案を説明する上面図である
。 11は混成集積回路基板、12は導電路、13は固着パ
ッド、14はヒートシンク、15はパワー半導体素子、
16は拡張部である。
Claims (1)
- 良熱伝導性の混成集積回路基板と該基板上に設けた所望
の導電路と該導電路の一部に設けたヒートシンクと略同
−形状の固着パッドと該固着パッドに半田付けしたヒー
トシンクと前記ヒートシンク上に固着したパワー半導体
素子とを具備する混成集積回路に於いて、前記固着パッ
ドの少くとも隣接した他の導電路と接する辺に拡張部を
設けて半田だめとして成る混成集積回路。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983041670U JPS59146960U (ja) | 1983-03-22 | 1983-03-22 | 混成集積回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1983041670U JPS59146960U (ja) | 1983-03-22 | 1983-03-22 | 混成集積回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS59146960U true JPS59146960U (ja) | 1984-10-01 |
JPS6348130Y2 JPS6348130Y2 (ja) | 1988-12-12 |
Family
ID=30172242
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1983041670U Granted JPS59146960U (ja) | 1983-03-22 | 1983-03-22 | 混成集積回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS59146960U (ja) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5056167A (ja) * | 1973-09-14 | 1975-05-16 |
-
1983
- 1983-03-22 JP JP1983041670U patent/JPS59146960U/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5056167A (ja) * | 1973-09-14 | 1975-05-16 |
Also Published As
Publication number | Publication date |
---|---|
JPS6348130Y2 (ja) | 1988-12-12 |
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