JPH0242787U - - Google Patents

Info

Publication number
JPH0242787U
JPH0242787U JP1988122993U JP12299388U JPH0242787U JP H0242787 U JPH0242787 U JP H0242787U JP 1988122993 U JP1988122993 U JP 1988122993U JP 12299388 U JP12299388 U JP 12299388U JP H0242787 U JPH0242787 U JP H0242787U
Authority
JP
Japan
Prior art keywords
solder material
melting point
view
point solder
showing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1988122993U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988122993U priority Critical patent/JPH0242787U/ja
Publication of JPH0242787U publication Critical patent/JPH0242787U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83194—Lateral distribution of the layer connectors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Die Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本考案の半田材の第１実施例を示す平
面図、第２図はその側面図、第３図は本考案の半
田材の第２実施例を示す斜視図、第４図は本考案
の半田材による溶融接着過程の説明図、第５図は
大パワーハイブリツドＩＣに従来の半田材を適用
した場合の接着構造例を示す側面図、第６図イ及
びロは、従来の半田材による接着前後の側面図、
第７図は従来の半田材による接着後のボイド発生
例を示す平面図である。 １０……本考案の半田材、１０ａ……低融点半
田材部、１０ｂ……高融点半田材部、１１……銅
製デイスク、１２……半導体ペレツト。

Claims (1)

    【実用新案登録請求の範囲】
  1. 中央部に低融点半田材部を、周囲に高融点半田
    材部を配して囲繞したことを特徴とする半田材。
JP1988122993U 1988-09-19 1988-09-19 Pending JPH0242787U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988122993U JPH0242787U (ja) 1988-09-19 1988-09-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988122993U JPH0242787U (ja) 1988-09-19 1988-09-19

Publications (1)

Publication Number Publication Date
JPH0242787U true JPH0242787U (ja) 1990-03-23

Family

ID=31371439

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988122993U Pending JPH0242787U (ja) 1988-09-19 1988-09-19

Country Status (1)

Country Link
JP (1) JPH0242787U (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109834A (ja) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
JP2008137034A (ja) * 2006-11-30 2008-06-19 Honda Motor Co Ltd ろう材およびろう付け方法
JP2008181939A (ja) * 2007-01-23 2008-08-07 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板並びにパワーモジュール
JP2008277335A (ja) * 2007-04-25 2008-11-13 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007109834A (ja) * 2005-10-13 2007-04-26 Fuji Electric Holdings Co Ltd 半導体装置およびその製造方法
JP2008137034A (ja) * 2006-11-30 2008-06-19 Honda Motor Co Ltd ろう材およびろう付け方法
JP2008181939A (ja) * 2007-01-23 2008-08-07 Mitsubishi Materials Corp パワーモジュール用基板の製造方法およびパワーモジュール用基板並びにパワーモジュール
JP4702293B2 (ja) * 2007-01-23 2011-06-15 三菱マテリアル株式会社 パワーモジュール用基板の製造方法およびパワーモジュール用基板並びにパワーモジュール
JP2008277335A (ja) * 2007-04-25 2008-11-13 Fuji Electric Device Technology Co Ltd 半導体装置およびその製造方法

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