JPS62132469U - - Google Patents
Info
- Publication number
- JPS62132469U JPS62132469U JP1933686U JP1933686U JPS62132469U JP S62132469 U JPS62132469 U JP S62132469U JP 1933686 U JP1933686 U JP 1933686U JP 1933686 U JP1933686 U JP 1933686U JP S62132469 U JPS62132469 U JP S62132469U
- Authority
- JP
- Japan
- Prior art keywords
- vin
- compensation
- reference voltage
- clock
- charge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案の一実施例の接続図、第２図は
従来の回路の接続図である。
Ｖｉｎ……入力信号、Ｖｒ……基準電圧、Ｖｚ
……接地電位、ＣＣＤ……電荷結合素子、Ａ／Ｄ
……アナログ・デイジタル変換器、ＯＰ……演算
器、ＤＩＳ……表示部。
FIG. 1 is a connection diagram of an embodiment of the present invention, and FIG. 2 is a connection diagram of a conventional circuit. Vin...Input signal, Vr...Reference voltage, Vz
...Ground potential, CCD...Charge coupled device, A/D
...Analog-digital converter, OP... Arithmetic unit, DIS... Display section.
Claims (1)
及びスパン補償用の基準電圧Ｖｒを切替えスイツ
チによつて切替えて第１のクロツクにより各入力
を夫々電荷結合素子内に読込んだのち第２のクロ
ツクにより転送し、アナログ・デイジタル変換器
によりデイジタル信号に変換された前記電荷結合
素子の各出力のＮ番目のデータを夫々Ｖｉｎ（Ｎ
），Ｖｚ（Ｎ），Ｖｒ（Ｎ）としたときこれらの
データを元に演算器によつて下式の補償演算を施
し、その演算結果を表示部で表示させるように構
成したことを特徴とするデイジタル・オシロスコ
ープ。 記 補償した値（Ｎ番目のデータ） ＝｛Ｖｉｎ（ｎ）−Ｖｚ（ｎ）｝／ ｛Ｖｒ（ｎ）−Ｖｚ（ｎ）｝[Scope of claim for utility model registration] Input signal Vin and reference voltage Vz for zero point compensation
and span compensation reference voltage Vr are switched by a changeover switch, each input is read into a charge-coupled device by the first clock, transferred by the second clock, and converted into a digital signal by an analog-to-digital converter. The Nth data of each output of the charge-coupled device converted into Vin(N
), Vz(N), and Vr(N), a compensating unit performs the following compensation calculation based on these data, and the result of the calculation is displayed on the display unit. Digital oscilloscope. Note: Compensated value (Nth data) = {Vin(n)-Vz(n)}/ {Vr(n)-Vz(n)}
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1933686U JPS62132469U (en) | 1986-02-13 | 1986-02-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1933686U JPS62132469U (en) | 1986-02-13 | 1986-02-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62132469U true JPS62132469U (en) | 1987-08-21 |
Family
ID=30813846
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1933686U Pending JPS62132469U (en) | 1986-02-13 | 1986-02-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62132469U (en) |
-
1986
- 1986-02-13 JP JP1933686U patent/JPS62132469U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS62132469U (en) | ||
| JPS63530U (en) | ||
| JPS6234871U (en) | ||
| JPH0410500U (en) | ||
| JPH029825U (en) | ||
| JPS6277929U (en) | ||
| JPH0426313U (en) | ||
| JPS6087041U (en) | digitizing integrator | |
| JPS6344166U (en) | ||
| JPH03113539U (en) | ||
| JPH0210639U (en) | ||
| JPH0174637U (en) | ||
| JPH01156470U (en) | ||
| JPS61206996U (en) | ||
| JPH0458048U (en) | ||
| JPS6429968U (en) | ||
| JPH0286233U (en) | ||
| JPS62146320U (en) | ||
| JPS6433665U (en) | ||
| JPS5899933U (en) | Analog to digital converter | |
| JPS5885832U (en) | Isolated analog-digital conversion circuit | |
| JPH0475435U (en) | ||
| JPS6448615U (en) | ||
| JPH0441676U (en) | ||
| JPS62164426U (en) |