JPH03113539U - - Google Patents
Info
- Publication number
- JPH03113539U JPH03113539U JP2189690U JP2189690U JPH03113539U JP H03113539 U JPH03113539 U JP H03113539U JP 2189690 U JP2189690 U JP 2189690U JP 2189690 U JP2189690 U JP 2189690U JP H03113539 U JPH03113539 U JP H03113539U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- bias
- circuit
- outputs
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Arrangements For Transmission Of Measured Signals (AREA)
- Analogue/Digital Conversion (AREA)
Description
第１図はこの考案の一実施例を示すブロツク図
、第２図は従来のテレメトリ装置を示すブロツク
図である。
図において１ａ〜１ｃはアナログ信号、２はマ
ルチプレクサ回路、３はデータ選択信号、４はデ
ータ信号、５はコマンド信号、６は基本バイアス
発生回路、７は基本バイアス信号、８はバイアス
設定回路、９はバイアス信号、１０は加算増幅器
、１１はアナログデータ信号、１２はＡ／Ｄコン
バータ、１３はデイジタル信号、１４は信号処理
回路、１５はテレメトリ信号である。なお、図中
同一符号同一又は相当部分を示す。
FIG. 1 is a block diagram showing an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional telemetry device. In the figure, 1a to 1c are analog signals, 2 is a multiplexer circuit, 3 is a data selection signal, 4 is a data signal, 5 is a command signal, 6 is a basic bias generation circuit, 7 is a basic bias signal, 8 is a bias setting circuit, 9 10 is a bias signal, 10 is a summing amplifier, 11 is an analog data signal, 12 is an A/D converter, 13 is a digital signal, 14 is a signal processing circuit, and 15 is a telemetry signal. In addition, the same reference numerals in the figures indicate the same or corresponding parts.
Claims (1)
順次選択しデータ信号として出力するマルチプレ
クサ回路と、Ａ／Ｄコンバータの入力レンジに応
じたバイアス電圧を発生する基本バイアス発生回
路と、上記データ信号とコマンド信号で指定され
た分解能指令及び上記基本バイアス発生回路の出
力を受けてこれらを処理し所定のバイアス信号を
出力するバイアス設定回路と、このバイアス設定
回路で出力されたバイアス信号と上記データ信号
を加算し、加算結果をコマンド信号で指定された
所定の倍率で増幅しアナログデータ信号として出
力する加算増幅回路と、上記アナログデータ信号
を受けてこれをデイジタル信号に変換するＡ／Ｄ
コンバータと、上記デイジタル信号を処理しテレ
メトリ信号として出力する信号処理回路とで構成
したテレメトリ装置。 A multiplexer circuit that sequentially selects a plurality of analog signals according to a data selection signal and outputs them as data signals, a basic bias generation circuit that generates a bias voltage according to the input range of the A/D converter, and the data signal and command signal. a bias setting circuit that receives and processes the resolution command specified by and the output of the basic bias generation circuit and outputs a predetermined bias signal; and a bias setting circuit that adds the bias signal output from this bias setting circuit and the above data signal. , an addition amplifier circuit that amplifies the addition result by a predetermined magnification specified by a command signal and outputs it as an analog data signal, and an A/D that receives the analog data signal and converts it into a digital signal.
A telemetry device comprising a converter and a signal processing circuit that processes the digital signal and outputs it as a telemetry signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2189690U JPH03113539U (en) | 1990-03-05 | 1990-03-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2189690U JPH03113539U (en) | 1990-03-05 | 1990-03-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH03113539U true JPH03113539U (en) | 1991-11-20 |
Family
ID=31524926
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2189690U Pending JPH03113539U (en) | 1990-03-05 | 1990-03-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH03113539U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017028366A (en) * | 2015-07-16 | 2017-02-02 | 株式会社デンソー | A/d conversion device |
-
1990
- 1990-03-05 JP JP2189690U patent/JPH03113539U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2017028366A (en) * | 2015-07-16 | 2017-02-02 | 株式会社デンソー | A/d conversion device |