JPS5899933U - Analog to digital converter - Google Patents
Analog to digital converterInfo
- Publication number
- JPS5899933U JPS5899933U JP19169581U JP19169581U JPS5899933U JP S5899933 U JPS5899933 U JP S5899933U JP 19169581 U JP19169581 U JP 19169581U JP 19169581 U JP19169581 U JP 19169581U JP S5899933 U JPS5899933 U JP S5899933U
- Authority
- JP
- Japan
- Prior art keywords
- analog
- digital converter
- reference voltage
- multiplexer
- digital
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図および第２図は従来の実施例を示すブロック図、
第３図は本考案の一実施例を示すブロック図である。
１．１′−・・・・・・アナログ信号用マルチプレクサ
、２．２′・・・・・・アナログ・デジタル変換器、３
・・・・・・電子式制御装置、４・・・・・・演算増幅
器、５・・・・・・基準電圧切替用マルチプレクサ、６
・・・・・・基準電圧。1 and 2 are block diagrams showing conventional embodiments,
FIG. 3 is a block diagram showing an embodiment of the present invention. 1.1'-... Analog signal multiplexer, 2.2'... Analog-to-digital converter, 3
...Electronic control device, 4...Operation amplifier, 5...Reference voltage switching multiplexer, 6
...Reference voltage.
Claims (1)
を選択するマルチプレクサと、選択されたアナログ信号
を与えられた基準電圧に従ってデジタル信号に変換する
アナログ・デジタル変換回路とを有するアナログ・デジ
タル変換器において、各入力アナログ信号毎の複数の基
準電圧がもうけられ、当該複数の基準電圧から順次ひと
つの基準電圧を選択して前記アナログ・デジタル変換回
路の基準電圧を提供するための、前記マルチプレクサと
同期して動作する基準電圧切替用マルチプレクサがもう
けられることを特徴とするアナログ・デジタル変換器。In an analog-to-digital converter having a multiplexer that sequentially selects one analog signal from a plurality of input analog signals, and an analog-to-digital conversion circuit that converts the selected analog signal into a digital signal according to a given reference voltage, each A plurality of reference voltages are generated for each input analog signal, and operates in synchronization with the multiplexer for sequentially selecting one reference voltage from the plurality of reference voltages to provide a reference voltage for the analog-to-digital conversion circuit. An analog-to-digital converter characterized in that a multiplexer for switching a reference voltage is provided.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19169581U JPS5899933U (en) | 1981-12-24 | 1981-12-24 | Analog to digital converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP19169581U JPS5899933U (en) | 1981-12-24 | 1981-12-24 | Analog to digital converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS5899933U true JPS5899933U (en) | 1983-07-07 |
Family
ID=30105144
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP19169581U Pending JPS5899933U (en) | 1981-12-24 | 1981-12-24 | Analog to digital converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5899933U (en) |
-
1981
- 1981-12-24 JP JP19169581U patent/JPS5899933U/en active Pending
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