JPS6062153U - data logger - Google Patents

data logger

Info

Publication number
JPS6062153U
JPS6062153U JP15283983U JP15283983U JPS6062153U JP S6062153 U JPS6062153 U JP S6062153U JP 15283983 U JP15283983 U JP 15283983U JP 15283983 U JP15283983 U JP 15283983U JP S6062153 U JPS6062153 U JP S6062153U
Authority
JP
Japan
Prior art keywords
data logger
analog
semiconductor switch
digital converter
input capacitors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP15283983U
Other languages
Japanese (ja)
Other versions
JPS6230104Y2 (en
Inventor
久 山本
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP15283983U priority Critical patent/JPS6062153U/en
Publication of JPS6062153U publication Critical patent/JPS6062153U/en
Application granted granted Critical
Publication of JPS6230104Y2 publication Critical patent/JPS6230104Y2/ja
Granted legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案に係るデータロガ−の実施例を示す接続
図、第２図は第１図の動作タイムチャートを示す図であ
る。 Ｋｌ、に２．に３・・・ケーブル、Ａ／Ｄ・・・二重積
分方式のアナログ・ディジタル変換器、ＣＨＧ。 ＣＨＬ・・・浮遊容量。FIG. 1 is a connection diagram showing an embodiment of a data logger according to the present invention, and FIG. 2 is a diagram showing an operation time chart of FIG. 1. Kl, 2. 3...Cable, A/D...Double integration analog/digital converter, CHG. CHL... Stray capacitance.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 多点のアナログ入力を入カケープルを介して順次二重積
分方式のアナログ・ディジタル変換器に導いてディジタ
ル信号に変換するようにしたデータロガ−において、前
記アナログ・ディジタル変換器における積分器が基準電
圧源を積分している期間導通し、前記入カケープル間に
存在する浮遊容量による電圧を放電させる半導体スイッ
チを前記入カケープル間に設けたことを特徴とするデー
タロガ−０In a data logger in which multiple analog inputs are sequentially guided to a double integration type analog-to-digital converter via input cables and converted into digital signals, the integrator in the analog-to-digital converter is connected to a reference voltage source. A data logger characterized in that a semiconductor switch is provided between the input capacitors, the semiconductor switch being conductive during the period of integration and discharging the voltage due to the stray capacitance existing between the input capacitors.
JP15283983U 1983-09-30 1983-09-30 data logger Granted JPS6062153U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15283983U JPS6062153U (en) 1983-09-30 1983-09-30 data logger

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15283983U JPS6062153U (en) 1983-09-30 1983-09-30 data logger

Publications (2)

Publication Number Publication Date
JPS6062153U true JPS6062153U (en) 1985-05-01
JPS6230104Y2 JPS6230104Y2 (en) 1987-08-03

Family

ID=30338312

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15283983U Granted JPS6062153U (en) 1983-09-30 1983-09-30 data logger

Country Status (1)

Country Link
JP (1) JPS6062153U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61245229A (en) * 1985-04-23 1986-10-31 Chino Corp Input device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61245229A (en) * 1985-04-23 1986-10-31 Chino Corp Input device

Also Published As

Publication number Publication date
JPS6230104Y2 (en) 1987-08-03

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