JPS58139738U - Digital-to-analog conversion circuit - Google Patents

Digital-to-analog conversion circuit

Info

Publication number
JPS58139738U
JPS58139738U JP3629382U JP3629382U JPS58139738U JP S58139738 U JPS58139738 U JP S58139738U JP 3629382 U JP3629382 U JP 3629382U JP 3629382 U JP3629382 U JP 3629382U JP S58139738 U JPS58139738 U JP S58139738U
Authority
JP
Japan
Prior art keywords
digital
output signal
conversion circuit
analog
analog output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3629382U
Other languages
Japanese (ja)
Inventor
国治 康孝
Original Assignee
アイワ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アイワ株式会社 filed Critical アイワ株式会社
Priority to JP3629382U priority Critical patent/JPS58139738U/en
Publication of JPS58139738U publication Critical patent/JPS58139738U/en
Pending legal-status Critical Current

Links

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

図面は本考案の実施例を示す回路構成図である。。 符号の説明、1・・・RAM、2・・・演算回路、3・
・・切換スイッチ、4・・・カウンタ、5・・・制御回
路、6・・・D/A変換器、7・・・スイッチング回路
、8・・・LPF、9・・・比較器、10・・・基準電
圧回路。
The drawing is a circuit configuration diagram showing an embodiment of the present invention. . Explanation of symbols, 1...RAM, 2...Arithmetic circuit, 3.
... Selector switch, 4... Counter, 5... Control circuit, 6... D/A converter, 7... Switching circuit, 8... LPF, 9... Comparator, 10. ...Reference voltage circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ディジタル−アナログ変換器のアナログ出力信号をスイ
ッチング回路によりLチャンネルアナログ出力信号とR
チャンネルアナログ出力信号に振り分けるも前記Lチャ
ンネルアナログ出力信号と前記Rチャンネルアナログ出
力信号のそれぞれに対して前記ディジタル−アナログ変
換器に入力されるディジタル信号に対応した基準電圧値
との差分を休出する比較器を具備し、該比較器の出力に
より前記ディジタル−アナログ変換器め前記ディジタル
信号に対応する前記アナログ出力信号を制御し得るよう
に構成してなることを特徴とするディジタル−アナログ
変換回路。
The analog output signal of the digital-to-analog converter is converted into an L channel analog output signal and an R channel analog output signal by a switching circuit.
The difference between the reference voltage value corresponding to the digital signal input to the digital-to-analog converter is calculated for each of the L channel analog output signal and the R channel analog output signal. A digital-to-analog conversion circuit comprising a comparator, and configured to control the analog output signal corresponding to the digital signal from the digital-to-analog converter by the output of the comparator.
JP3629382U 1982-03-17 1982-03-17 Digital-to-analog conversion circuit Pending JPS58139738U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3629382U JPS58139738U (en) 1982-03-17 1982-03-17 Digital-to-analog conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3629382U JPS58139738U (en) 1982-03-17 1982-03-17 Digital-to-analog conversion circuit

Publications (1)

Publication Number Publication Date
JPS58139738U true JPS58139738U (en) 1983-09-20

Family

ID=30047729

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3629382U Pending JPS58139738U (en) 1982-03-17 1982-03-17 Digital-to-analog conversion circuit

Country Status (1)

Country Link
JP (1) JPS58139738U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5673925A (en) * 1979-11-21 1981-06-19 Hitachi Ltd Storage device for linear error

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5673925A (en) * 1979-11-21 1981-06-19 Hitachi Ltd Storage device for linear error

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