JPS5834439U - Digital-to-analog converter output error compensation circuit - Google Patents

Digital-to-analog converter output error compensation circuit

Info

Publication number
JPS5834439U
JPS5834439U JP12668281U JP12668281U JPS5834439U JP S5834439 U JPS5834439 U JP S5834439U JP 12668281 U JP12668281 U JP 12668281U JP 12668281 U JP12668281 U JP 12668281U JP S5834439 U JPS5834439 U JP S5834439U
Authority
JP
Japan
Prior art keywords
digital
signal
analog converter
compensation circuit
error compensation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12668281U
Other languages
Japanese (ja)
Inventor
智久 石川
Original Assignee
カシオ計算機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by カシオ計算機株式会社 filed Critical カシオ計算機株式会社
Priority to JP12668281U priority Critical patent/JPS5834439U/en
Publication of JPS5834439U publication Critical patent/JPS5834439U/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の回路構成図、第2図は補正
回路16の詳細回路図、第3図は動作を説明する信号波
形図である。 11・・・デジタル信号出力装置、12・・・スイッチ
回路、13・・・ラダー抵抗回路、16・・・補正回路
、20・・・可変抵抗、21. 23. 24. 25
. 26゜27・・・抵抗、22・・・演算増幅器。
FIG. 1 is a circuit configuration diagram of an embodiment of the present invention, FIG. 2 is a detailed circuit diagram of the correction circuit 16, and FIG. 3 is a signal waveform diagram explaining the operation. DESCRIPTION OF SYMBOLS 11... Digital signal output device, 12... Switch circuit, 13... Ladder resistance circuit, 16... Correction circuit, 20... Variable resistor, 21. 23. 24. 25
.. 26°27...Resistor, 22...Operation amplifier.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数ビットのデジタル信号を出力するデジタル信号出力
装置から特定ビット信号を含む前記デジタル信号がデジ
タル−アナログ変換器に供給された際、このデジタル−
アナログ変換して得られる信号が不連続性を示すデジタ
ルーア≠ログ変換器において、上記特定ビットからの信
号を取り出しこの信号を抵抗分割して出力する手段と、
この出力した信号を入力すると共に上記デジタル−アナ
ログ変換器の出力を一方入力端の入力とする演算増幅器
とを具備し、上記アナログ出力信号の不連続性を除去し
て成るデジタル−アナログ変換器の出力誤差補償回路。
When the digital signal including the specific bit signal is supplied to the digital-to-analog converter from the digital signal output device that outputs the digital signal of multiple bits, the digital
In a digital-to-log converter in which a signal obtained by analog conversion exhibits discontinuity, means for extracting a signal from the specific bit, dividing the signal by resistance, and outputting the signal;
A digital-to-analog converter is provided, comprising an operational amplifier that receives the output signal and has one input end of the output of the digital-to-analog converter, and removes discontinuity in the analog output signal. Output error compensation circuit.
JP12668281U 1981-08-26 1981-08-26 Digital-to-analog converter output error compensation circuit Pending JPS5834439U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12668281U JPS5834439U (en) 1981-08-26 1981-08-26 Digital-to-analog converter output error compensation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12668281U JPS5834439U (en) 1981-08-26 1981-08-26 Digital-to-analog converter output error compensation circuit

Publications (1)

Publication Number Publication Date
JPS5834439U true JPS5834439U (en) 1983-03-05

Family

ID=29920462

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12668281U Pending JPS5834439U (en) 1981-08-26 1981-08-26 Digital-to-analog converter output error compensation circuit

Country Status (1)

Country Link
JP (1) JPS5834439U (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6299075U (en) * 1985-12-10 1987-06-24
JPH01238226A (en) * 1988-01-21 1989-09-22 Advanced Micro Devicds Inc Digital-analog converter network
JP2015172723A (en) * 2014-02-24 2015-10-01 アルパイン株式会社 Display device and display control method

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232657A (en) * 1975-09-09 1977-03-12 Fujitsu Ltd Digital-analog converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5232657A (en) * 1975-09-09 1977-03-12 Fujitsu Ltd Digital-analog converter

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6299075U (en) * 1985-12-10 1987-06-24
JPH01238226A (en) * 1988-01-21 1989-09-22 Advanced Micro Devicds Inc Digital-analog converter network
JP2015172723A (en) * 2014-02-24 2015-10-01 アルパイン株式会社 Display device and display control method

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