JPS6133518U - Muting circuit - Google Patents
Muting circuitInfo
- Publication number
- JPS6133518U JPS6133518U JP11661784U JP11661784U JPS6133518U JP S6133518 U JPS6133518 U JP S6133518U JP 11661784 U JP11661784 U JP 11661784U JP 11661784 U JP11661784 U JP 11661784U JP S6133518 U JPS6133518 U JP S6133518U
- Authority
- JP
- Japan
- Prior art keywords
- audio signal
- digital
- muting circuit
- muting
- analog
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図はこの考案のミューティング回路の実施例を示す
ブロック図、第２図はその動作波形を示す説明図である
。
２・・・・・・ディジタル・アナログ変換器（ＤＡＣ）
、６・・・・・・波形制御回路。FIG. 1 is a block diagram showing an embodiment of the muting circuit of this invention, and FIG. 2 is an explanatory diagram showing its operating waveforms. 2...Digital-to-analog converter (DAC)
, 6... Waveform control circuit.
Claims (1)
変換するデイジタル・アナログ変換器の出力側に、ミュ
ーテイング制御入力に応動して前記デイジタル・アナロ
グ変換器で得られる前記アナログオーディオ信号の波形
を段階的に下降または上昇させる波形制御回路を設置し
たことを特徴とするミューテイング回路。On the output side of a digital-to-analog converter that converts a digital audio signal into an analog audio signal, the waveform of the analog audio signal obtained by the digital-to-analog converter is lowered or raised in steps in response to a muting control input. A muting circuit characterized by having a waveform control circuit installed therein.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11661784U JPS6133518U (en) | 1984-07-30 | 1984-07-30 | Muting circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11661784U JPS6133518U (en) | 1984-07-30 | 1984-07-30 | Muting circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6133518U true JPS6133518U (en) | 1986-02-28 |
Family
ID=30675553
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11661784U Pending JPS6133518U (en) | 1984-07-30 | 1984-07-30 | Muting circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6133518U (en) |
-
1984
- 1984-07-30 JP JP11661784U patent/JPS6133518U/en active Pending
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