JPS59157360U - pin distortion correction circuit - Google Patents

pin distortion correction circuit

Info

Publication number
JPS59157360U
JPS59157360U JP5113483U JP5113483U JPS59157360U JP S59157360 U JPS59157360 U JP S59157360U JP 5113483 U JP5113483 U JP 5113483U JP 5113483 U JP5113483 U JP 5113483U JP S59157360 U JPS59157360 U JP S59157360U
Authority
JP
Japan
Prior art keywords
correction circuit
distortion correction
pin distortion
inverting input
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5113483U
Other languages
Japanese (ja)
Inventor
小野寺 敏夫
Original Assignee
ソニー株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ソニー株式会社 filed Critical ソニー株式会社
Priority to JP5113483U priority Critical patent/JPS59157360U/en
Publication of JPS59157360U publication Critical patent/JPS59157360U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の回路の構成図、第2図はその説明のため
の図、第3図は本考案の一例の構成図、第4図はその説
明のための図である。 15は演算増幅器、16は可変抵抗器である。
FIG. 1 is a block diagram of a conventional circuit, FIG. 2 is a diagram for explaining the same, FIG. 3 is a block diagram of an example of the present invention, and FIG. 4 is a diagram for explaining the same. 15 is an operational amplifier, and 16 is a variable resistor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 演算増幅器の非反転入力にパラボラ波形と鋸歯状波形の
加算信号を印加し、上記演算増幅器の反転入力に上記鋸
歯状波形の信号を印加し、上記反転入力に印加される鋸
歯状波形の信号のレベルを゛    変化させてピン歪
位相補正を行うようにしたピン歪補正回路。
A summed signal of a parabolic waveform and a sawtooth waveform is applied to the non-inverting input of the operational amplifier, a signal of the sawtooth waveform is applied to the inverting input of the operational amplifier, and a signal of the sawtooth waveform applied to the inverting input is A pin distortion correction circuit that corrects the pin distortion phase by changing the level.
JP5113483U 1983-04-06 1983-04-06 pin distortion correction circuit Pending JPS59157360U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5113483U JPS59157360U (en) 1983-04-06 1983-04-06 pin distortion correction circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5113483U JPS59157360U (en) 1983-04-06 1983-04-06 pin distortion correction circuit

Publications (1)

Publication Number Publication Date
JPS59157360U true JPS59157360U (en) 1984-10-22

Family

ID=30181557

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5113483U Pending JPS59157360U (en) 1983-04-06 1983-04-06 pin distortion correction circuit

Country Status (1)

Country Link
JP (1) JPS59157360U (en)

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