JPS6123740U - Digital/analog conversion circuit - Google Patents
Digital/analog conversion circuitInfo
- Publication number
- JPS6123740U JPS6123740U JP10720684U JP10720684U JPS6123740U JP S6123740 U JPS6123740 U JP S6123740U JP 10720684 U JP10720684 U JP 10720684U JP 10720684 U JP10720684 U JP 10720684U JP S6123740 U JPS6123740 U JP S6123740U
- Authority
- JP
- Japan
- Prior art keywords
- digital
- conversion circuit
- analog conversion
- photocoupler
- capacitor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第1図は本考案の実施例を示す回路図、第2図A, B
は夫々デイジタル回路の出力信号、アナログ回路の出力
信号を示す波形図である。
PC・・・・・・フォトカプラ、T・・・・・・放電用
トランジスタ、C・・・・・・コンデンサ、R5・・・
・・・制限抵抗。Figure 1 is a circuit diagram showing an embodiment of the present invention, Figure 2 A and B
are waveform diagrams showing output signals of a digital circuit and an output signal of an analog circuit, respectively. PC: Photocoupler, T: Discharge transistor, C: Capacitor, R5:
...limiting resistance.
Claims (1)
プラと、このフォトカプラの出力側にベースが接続され
、当該フォトカプラの出力信号に−より作動する放電用
トランジスタと、この放電用トランジスタのエミツタ、
コレクタ間に接続されたコンデンサとを有し、前記コン
サに充電された電荷を前記放電用トランジスタの作動時
にこれを介して放電させることを特徴とするデイジタル
・アナログ変換回路。A photocoupler that emits an output signal in response to input of a digital signal, a discharging transistor whose base is connected to the output side of the photocoupler and is activated by the output signal of the photocoupler, and an emitter of the discharging transistor.
1. A digital-to-analog conversion circuit, comprising: a capacitor connected between collectors; the charge charged in the capacitor is discharged through the capacitor when the discharging transistor is activated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10720684U JPS6123740U (en) | 1984-07-16 | 1984-07-16 | Digital/analog conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10720684U JPS6123740U (en) | 1984-07-16 | 1984-07-16 | Digital/analog conversion circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6123740U true JPS6123740U (en) | 1986-02-12 |
Family
ID=30666463
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10720684U Pending JPS6123740U (en) | 1984-07-16 | 1984-07-16 | Digital/analog conversion circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6123740U (en) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50115462A (en) * | 1974-02-20 | 1975-09-10 |
-
1984
- 1984-07-16 JP JP10720684U patent/JPS6123740U/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS50115462A (en) * | 1974-02-20 | 1975-09-10 |
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