JPS5834437U - Pulse generation circuit - Google Patents

Pulse generation circuit

Info

Publication number
JPS5834437U
JPS5834437U JP12739881U JP12739881U JPS5834437U JP S5834437 U JPS5834437 U JP S5834437U JP 12739881 U JP12739881 U JP 12739881U JP 12739881 U JP12739881 U JP 12739881U JP S5834437 U JPS5834437 U JP S5834437U
Authority
JP
Japan
Prior art keywords
generation circuit
pulse generation
input
pulse signal
comparator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12739881U
Other languages
Japanese (ja)
Inventor
川俣 誠一
Original Assignee
富士通株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 富士通株式会社 filed Critical 富士通株式会社
Priority to JP12739881U priority Critical patent/JPS5834437U/en
Publication of JPS5834437U publication Critical patent/JPS5834437U/en
Pending legal-status Critical Current

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  • Pulse Circuits (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の実施例によるパルス発生回路、第2図
はその波形図を示す。 図において、COMはコンパレータ、DIAハチシタル
ーアナログコンバータ、IN■はインバータ、Aは論理
積回路を示す。
FIG. 1 shows a pulse generating circuit according to an embodiment of the present invention, and FIG. 2 shows its waveform diagram. In the figure, COM is a comparator, DIA is an analog converter, IN is an inverter, and A is an AND circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力パルス信号を抵抗とコンデンサからなる積分回路を
経てコンパレータの一方の入力端子に、かつD/Aコン
バータの出力を他方の入力端子に接続し、該コンパレー
タの出力と前記入力パルス信号との論理積回路を設け、
前記D/Aコンバータの入力に応じて入力パルス信号の
デユーティ比を可変するようにした事を特徴とするパル
ス発生回路。
The input pulse signal is connected to one input terminal of a comparator through an integrating circuit consisting of a resistor and a capacitor, and the output of the D/A converter is connected to the other input terminal, and the output of the comparator and the input pulse signal are logically multiplied. Set up a circuit,
A pulse generation circuit characterized in that the duty ratio of an input pulse signal is varied according to the input of the D/A converter.
JP12739881U 1981-08-28 1981-08-28 Pulse generation circuit Pending JPS5834437U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12739881U JPS5834437U (en) 1981-08-28 1981-08-28 Pulse generation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12739881U JPS5834437U (en) 1981-08-28 1981-08-28 Pulse generation circuit

Publications (1)

Publication Number Publication Date
JPS5834437U true JPS5834437U (en) 1983-03-05

Family

ID=29921126

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12739881U Pending JPS5834437U (en) 1981-08-28 1981-08-28 Pulse generation circuit

Country Status (1)

Country Link
JP (1) JPS5834437U (en)

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