JPS5942644U - Multi-input AD converter - Google Patents

Multi-input AD converter

Info

Publication number
JPS5942644U
JPS5942644U JP13722182U JP13722182U JPS5942644U JP S5942644 U JPS5942644 U JP S5942644U JP 13722182 U JP13722182 U JP 13722182U JP 13722182 U JP13722182 U JP 13722182U JP S5942644 U JPS5942644 U JP S5942644U
Authority
JP
Japan
Prior art keywords
input
comparators
large number
converter
input signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP13722182U
Other languages
Japanese (ja)
Inventor
保夫 中井
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP13722182U priority Critical patent/JPS5942644U/en
Publication of JPS5942644U publication Critical patent/JPS5942644U/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案装置の一実施例を示す接続図、第２図は
その動作説明図、第３図は本考案装置の他の実施例を示
す接続図である。 ＣＭ□〜ＣＭｎ・・・コンパレータ、ＬＳ・・・ランプ
信号発生回路、Ｇｏ、　Ｇ□、　Ｇｎ・・・ゲート回路
、ｃｕｏ。 、　ＣＵ１〜ＣＵｎ・・・カウンタ、ＰＳ・・・クロッ
クパルス。FIG. 1 is a connection diagram showing one embodiment of the device of the present invention, FIG. 2 is an explanatory diagram of its operation, and FIG. 3 is a connection diagram showing another embodiment of the device of the present invention. CM□ to CMn... Comparator, LS... Ramp signal generation circuit, Go, G□, Gn... Gate circuit, cuo. , CU1-CUn...Counter, PS...Clock pulse.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 、多数の入力信号と、これら入力信号が各入力毎に加え
られる多数のコンパレータと、こレラコンバレータにラ
ンプ信号を共通に与える手段と、前記多数のコンパレー
タの出力を同時に監視し、各入力信号に対応する時間を
それぞれ計数する手段とを備えたことを特徴とする多入
力ＡＤ変換装置。, a large number of input signals, a large number of comparators to which these input signals are applied to each input, means for commonly providing a ramp signal to the comparators, and a means for simultaneously monitoring the outputs of the large number of comparators and responding to each input signal. A multi-input AD conversion device characterized by comprising: means for counting respective times for each input.
JP13722182U 1982-09-10 1982-09-10 Multi-input AD converter Pending JPS5942644U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13722182U JPS5942644U (en) 1982-09-10 1982-09-10 Multi-input AD converter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13722182U JPS5942644U (en) 1982-09-10 1982-09-10 Multi-input AD converter

Publications (1)

Publication Number Publication Date
JPS5942644U true JPS5942644U (en) 1984-03-19

Family

ID=30308285

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13722182U Pending JPS5942644U (en) 1982-09-10 1982-09-10 Multi-input AD converter

Country Status (1)

Country Link
JP (1) JPS5942644U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61157810U (en) * 1985-03-22 1986-09-30

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61157810U (en) * 1985-03-22 1986-09-30

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