JPS60166045U

JPS60166045U - A/D conversion data acquisition device

Info

Publication number: JPS60166045U
Application number: JP5040884U
Authority: JP
Inventors: 敏秋塚田; 笠江　敏信; 透北村; 佳彦後藤
Original assignee: 横河電機株式会社
Priority date: 1984-04-06
Filing date: 1984-04-06
Publication date: 1985-11-05

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Brief explanation of drawings]

第１図は従来のＡ／Ｄ変換データ集録装置の基本構成を
示す構成ブロック図、第２図は本考案に係わるＡ／Ｄ変
換デニタ集録装置を示すためのブロック構成−、第３図
および第４図は第２図めＡ／Ｄ変換データ集録装置の動
作を説明するためのタイムチャート、第５図はアナログ
入力信号がサンプリングされる様子を示すタイムチャー
トである。　　　　− １２、，１２□、・・・、１２ｎ・・・サンプルホール
ド回路、１３１　ｑ　　１３２　、””９　１３１”’
Ａ／Ｄ変換器、１４・・・メモリ、１５・・・計数回路
、１６・・・制御回路。FIG. 1 is a block diagram showing the basic configuration of a conventional A/D conversion data acquisition device, FIG. 2 is a block diagram showing an A/D conversion data acquisition device according to the present invention, FIG. FIG. 4 is a time chart for explaining the operation of the A/D conversion data acquisition device shown in FIG. 2, and FIG. 5 is a time chart showing how an analog input signal is sampled. - 12,,12□,...,12n...sample hold circuit, 131 q 132, ""9 131"'
A/D converter, 14... memory, 15... counting circuit, 16... control circuit.

Claims

[Claims for Utility Model Registration] A plurality of sample and hold circuits that sequentially sample and hold commonly applied analog input signals, and the outputs of the corresponding sample and hold circuits. a plurality of pass line direct-coupled A/D converters for inputting data, a memory connected to the plurality of A/D converters and into which the converted data is sequentially written, and a counting circuit for specifying an address of the memory; a control circuit that controls the operation of each of the circuits, and after the analog input signal is sampled and held in one of the sample and hold circuits, the other sample and hold circuit is configured to control the operation of each of the circuits; An A/D conversion data acquisition device, characterized in that the analog input signal is configured to be sampled and held in a hold circuit.