JPH01147535U - - Google Patents
Info
- Publication number
- JPH01147535U JPH01147535U JP4289188U JP4289188U JPH01147535U JP H01147535 U JPH01147535 U JP H01147535U JP 4289188 U JP4289188 U JP 4289188U JP 4289188 U JP4289188 U JP 4289188U JP H01147535 U JPH01147535 U JP H01147535U
- Authority
- JP
- Japan
- Prior art keywords
- analog
- digital
- digital converter
- conversion circuit
- input signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第1図は本考案のAD変換器ブロツク図、第2
図は本考案のμプロセツサの処理フローチヤート
、第3図は適用入力信号例である。第4図は従来
のAD変換器の基本ブロツク図。
2:増幅回路、3:AD変換器、7:高周波フ
イルタ、8:AD変換器。
Figure 1 is a block diagram of the AD converter of the present invention, Figure 2
The figure is a processing flowchart of the μ processor of the present invention, and FIG. 3 is an example of an applied input signal. FIG. 4 is a basic block diagram of a conventional AD converter. 2: Amplifier circuit, 3: AD converter, 7: High frequency filter, 8: AD converter.
Claims (1)
ナログ・デイジタル変換器を有し、第1のアナロ
グ・デイジタル変換器で入力信号の低周波直流レ
ベルをデイジタル値に変換し、このデータに求づ
いてマイクロプロセツサにより入力信号に対して
直流的な信号変換を施し、その結果を前記第2の
アナログ・デイジタル変換器に入力できる構成の
アナログ・デイジタル変換回路であつて、前記第
1、第2のアナログ・デイジタル変換器からのデ
イジタルデータを出力データとすることにより、
アナログ・デイジタル変換回路を構成することを
特徴としたアナログ・デイジタル変換回路。 It has a first analog-to-digital converter and a second analog-to-digital converter, and the first analog-to-digital converter converts the low frequency DC level of the input signal into a digital value. An analog-to-digital conversion circuit configured to perform DC signal conversion on an input signal by a microprocessor and input the result to the second analog-to-digital converter, the circuit comprising: By using digital data from an analog-to-digital converter as output data,
An analog/digital conversion circuit characterized by configuring an analog/digital conversion circuit.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4289188U JPH0528832Y2 (en) | 1988-04-01 | 1988-04-01 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4289188U JPH0528832Y2 (en) | 1988-04-01 | 1988-04-01 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01147535U true JPH01147535U (en) | 1989-10-12 |
JPH0528832Y2 JPH0528832Y2 (en) | 1993-07-23 |
Family
ID=31269294
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4289188U Expired - Lifetime JPH0528832Y2 (en) | 1988-04-01 | 1988-04-01 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0528832Y2 (en) |
-
1988
- 1988-04-01 JP JP4289188U patent/JPH0528832Y2/ja not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JPH0528832Y2 (en) | 1993-07-23 |
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