JPS60135937U - Multi-input analog sampling circuit - Google Patents
Multi-input analog sampling circuitInfo
- Publication number
- JPS60135937U JPS60135937U JP2288784U JP2288784U JPS60135937U JP S60135937 U JPS60135937 U JP S60135937U JP 2288784 U JP2288784 U JP 2288784U JP 2288784 U JP2288784 U JP 2288784U JP S60135937 U JPS60135937 U JP S60135937U
- Authority
- JP
- Japan
- Prior art keywords
- sampling circuit
- input analog
- analog sampling
- input
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Control By Computers (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図及び第２図は従来の多入力アナログサンプリング
回路図、第３図は本考案の一実施例を示す回路図、第４
図は第３図における加算回路の動作説明のための波形図
である。
３・・・マルチプレクサ、４・・・サンプルホールド回
路、５・・・Ａ／Ｄ変換器、７０，７□、７ｎ・・・加
算−回路、８・・・絶縁アンプ。Figures 1 and 2 are conventional multiple-input analog sampling circuit diagrams, Figure 3 is a circuit diagram showing an embodiment of the present invention, and Figure 4 is a circuit diagram showing an embodiment of the present invention.
This figure is a waveform diagram for explaining the operation of the adder circuit in FIG. 3. 3... Multiplexer, 4... Sample hold circuit, 5... A/D converter, 70, 7□, 7n... Addition circuit, 8... Isolation amplifier.
Claims (1)
の入力を夫々前チャンネルの反転信号にした複数の加算
回路と、各加算回路の出力を順次切換えて出力するマル
チプレクサと、このマルチプレクサの出力を絶縁して取
込む絶縁アンプと、このアンプの出力をディジタル量に
変換するサンプルホールド回路及びＡ／Ｄ変換器とを備
えたことを特徴とする多入力アナログサンプリング回路
。A plurality of adder circuits each having a multi-channel analog signal as an input and the other input being an inverted signal of the previous channel, a multiplexer that sequentially switches and outputs the output of each adder circuit, and the output of this multiplexer is isolated. What is claimed is: 1. A multi-input analog sampling circuit comprising: an isolated amplifier for taking in data; and a sample-hold circuit and an A/D converter for converting the output of the amplifier into a digital quantity.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2288784U JPS60135937U (en) | 1984-02-20 | 1984-02-20 | Multi-input analog sampling circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2288784U JPS60135937U (en) | 1984-02-20 | 1984-02-20 | Multi-input analog sampling circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS60135937U true JPS60135937U (en) | 1985-09-10 |
Family
ID=30515606
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2288784U Pending JPS60135937U (en) | 1984-02-20 | 1984-02-20 | Multi-input analog sampling circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60135937U (en) |
-
1984
- 1984-02-20 JP JP2288784U patent/JPS60135937U/en active Pending
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