JPH0418370U - - Google Patents
Info
- Publication number
- JPH0418370U JPH0418370U JP5980390U JP5980390U JPH0418370U JP H0418370 U JPH0418370 U JP H0418370U JP 5980390 U JP5980390 U JP 5980390U JP 5980390 U JP5980390 U JP 5980390U JP H0418370 U JPH0418370 U JP H0418370U
- Authority
- JP
- Japan
- Prior art keywords
- digital signal
- data bus
- parallel
- serial
- converting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001228 spectrum Methods 0.000 claims description 2
- 238000006243 chemical reaction Methods 0.000 claims 1
- 230000009466 transformation Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第1図はこの考案の実施例を示すブロツク図、
第2図は従来のデジタルスペクトルアナライザを
示すブロツク図、第3図はデジタルズーム回路1
4の具体例を示すブロツク図である。
Figure 1 is a block diagram showing an embodiment of this invention.
Figure 2 is a block diagram showing a conventional digital spectrum analyzer, and Figure 3 is a digital zoom circuit 1.
FIG. 4 is a block diagram showing a specific example of No. 4;
Claims (1)
するAD変換器と、 そのAD変換器からの並列デジタル信号を入力
し、これを直列のデジタル信号に変換して出力す
る手段、デジタルズーム回路からの直列デジタル
信号を並列デジタル信号に変換する手段、及びそ
の変換された並列デジタル信号と上記入力された
並列デジタル信号との何れかを選択してデータバ
スへ出力するインタフエース回路と、 上記データバスに接続された中央処理装置と、 上記データバスに接続され、そのデータバス上
のデータを記憶するメモリと、 上記データバスに接続され、上記メモリに記憶
されたデータを高速フーリエ変換するFFT部と
、 上記データバスに接続され、そのデータバス上
の並列デジタル信号を直列デジタル信号に変換す
る並列直列変換回路と、 その並列直列変換回路の出力直列デジタル信号
と上記インタフエース回路よりの変換された直列
デジタル信号との何れかを選択するマルチプレク
サと、 そのマルチプレクサにより選択された直列デジ
タル信号が供給される上記デジタルズーム回路と
、 を具備するデジタルスペクトルアナライザ。[Claims for Utility Model Registration] An AD converter that converts an input analog signal into a parallel digital signal, and a means for inputting the parallel digital signal from the AD converter, converting it into a serial digital signal, and outputting it. , means for converting the serial digital signal from the digital zoom circuit into a parallel digital signal, and an interface circuit for selecting either the converted parallel digital signal or the input parallel digital signal and outputting the selected one to the data bus. , a central processing unit connected to the data bus; a memory connected to the data bus and storing data on the data bus; and a memory connected to the data bus and performing fast Fourier transformation on the data stored in the memory. A parallel-to-serial conversion circuit connected to the data bus and converting parallel digital signals on the data bus into serial digital signals; A digital spectrum analyzer comprising: a multiplexer for selecting one of the converted serial digital signals; and the digital zoom circuit to which the serial digital signal selected by the multiplexer is supplied.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5980390U JPH0418370U (en) | 1990-06-06 | 1990-06-06 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5980390U JPH0418370U (en) | 1990-06-06 | 1990-06-06 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0418370U true JPH0418370U (en) | 1992-02-17 |
Family
ID=31586623
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5980390U Pending JPH0418370U (en) | 1990-06-06 | 1990-06-06 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0418370U (en) |
-
1990
- 1990-06-06 JP JP5980390U patent/JPH0418370U/ja active Pending
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