JPH0172645U - - Google Patents
Info
- Publication number
- JPH0172645U JPH0172645U JP1987165886U JP16588687U JPH0172645U JP H0172645 U JPH0172645 U JP H0172645U JP 1987165886 U JP1987165886 U JP 1987165886U JP 16588687 U JP16588687 U JP 16588687U JP H0172645 U JPH0172645 U JP H0172645U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- expansion unit
- digital
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案実施例装置の構成図、第２図は
、第１図の本考案実施例装置における信号波形図
、第３図は従来装置の構成図である。
１ａ，１ｂ，１ｃ・・・……プロセスガスクロ
マトグラフ装置、２……信号処理装置、２ａ……
デイジタル入力インターフエイス、２ｆ……アナ
ログ出力インターフエイス、Ｔ１，Ｔ２，Ｔ３・
・・……出力ターミナル、２ｉ……デイジタル出
力インターフエイス、３，４……バス、５，６・
・・……信号出力増設ユニツト、５ａ……デイジ
タル入力インターフエイス、５ｆ……アナログ出
力インターフエイス、Ｔ５１，Ｔ５２・・・……
出力ターミナル。
FIG. 1 is a block diagram of an apparatus according to an embodiment of the present invention, FIG. 2 is a signal waveform diagram in the apparatus according to an embodiment of the present invention shown in FIG. 1, and FIG. 3 is a block diagram of a conventional apparatus. 1a, 1b, 1c... Process gas chromatograph device, 2... Signal processing device, 2a...
Digital input interface, 2f...Analog output interface, T 1 , T 2 , T 3・
...... Output terminal, 2i... Digital output interface, 3, 4... Bus, 5, 6.
......Signal output expansion unit, 5a...Digital input interface, 5f...Analog output interface, T51 , T52 ......
Output terminal.
Claims (1)
処理し、メモリに記憶させ、記憶させたデータを
Ｄ／Ａ変換し各別に出力させるようにした信号処
理装置において、 ａ 前記データにうち後出の信号出力増設ユニツ
トから出力させるデータにデータ識別情報を付加
し、デジタル信号に変換して送出するデジタル出
力インターフエイスと、 ｂ このデジタル信号を伝送する外部バスと、 ｃ このバスに接続され前記識別情報に基づき前
記デジタル信号を選択的に取込み、取込んだ複数
のデジタル信号をＤ／Ａ変換し出力ターミナルよ
り各別に出力させるようにした信号出力増設ユニ
ツト とを設け、前記データの数に応じて前記信号出力
増設ユニツトを増設し、前記信号源から与えられ
る信号の全てを出力できるようにしたことを特徴
とする信号出力増設ユニツトを有する信号処理装
置。[Claims for Utility Model Registration] A signal processing device that processes a plurality of input signals given from a plurality of signal sources, stores them in a memory, converts the stored data from D/A, and outputs each signal separately, a. A digital output interface that adds data identification information to the data to be output from the signal output expansion unit to be described later, converts it into a digital signal, and sends it out; b. An external bus that transmits this digital signal; c. a signal output expansion unit connected to the bus and selectively capturing the digital signals based on the identification information, converting the captured digital signals from D/A to outputting each signal separately from the output terminal; A signal processing device having a signal output expansion unit, characterized in that the signal output expansion unit is expanded according to the number of data, so that all of the signals given from the signal source can be output.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987165886U JPH0172645U (en) | 1987-10-29 | 1987-10-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987165886U JPH0172645U (en) | 1987-10-29 | 1987-10-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0172645U true JPH0172645U (en) | 1989-05-16 |
Family
ID=31452777
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987165886U Pending JPH0172645U (en) | 1987-10-29 | 1987-10-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0172645U (en) |
-
1987
- 1987-10-29 JP JP1987165886U patent/JPH0172645U/ja active Pending
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