JPS62147975U - - Google Patents
Info
- Publication number
- JPS62147975U JPS62147975U JP3667286U JP3667286U JPS62147975U JP S62147975 U JPS62147975 U JP S62147975U JP 3667286 U JP3667286 U JP 3667286U JP 3667286 U JP3667286 U JP 3667286U JP S62147975 U JPS62147975 U JP S62147975U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- image signal
- gate
- inputting
- input section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Television Signal Processing For Recording (AREA)
Description
第１図は本考案装置の１実施例の回路ブロツク
図、第２図ａ，ｂ，ｃはデイザパターン信号発生
手段のデイザパターン図、第３図は演算手段の動
作説明図である。
１…画像信号入力部、２…Ａ／Ｄコンバータ、
３，４，５…デイザパターン信号発生手段、８…
デコーダ、９…ゲート手段、１０…演算手段、１
１…デジタルメモリ。
FIG. 1 is a circuit block diagram of one embodiment of the device of the present invention, FIGS. 2a, b, and c are dither pattern diagrams of the dither pattern signal generating means, and FIG. 3 is an explanatory diagram of the operation of the arithmetic means. 1... Image signal input section, 2... A/D converter,
3, 4, 5... dither pattern signal generating means, 8...
Decoder, 9... Gate means, 10... Arithmetic means, 1
1...Digital memory.
Claims (1)
ルメモリに格納する装置において、前記画像信号
を入力する画像信号入力部と、該画像信号入力部
に接続されており該画像信号入力部からの前記画
像信号をｍレベルに量子化しこれをｎビツトのデ
ジタル信号に変換するＡ／Ｄコンバータと、該Ａ
／Ｄコンバータに同期駆動されデイザパターン信
号を出力するデイザパターン信号発生手段と、前
記Ａ／Ｄコンバータに接続され前記デイジタル信
号中のＰビツトを入力してゲート信号を作成する
デコーダと、前記デイザパターン信号と前記ゲー
ト信号を入力するゲート手段と、前記Ａ／Ｄコン
バータよりのデイジタル信号中のｎ―ｐビツトと
前記ゲート手段を通じて付与されるデイザパター
ン信号とを入力してｇビツトの記録データを演算
出力する演算手段と、該演算手段に接続されてい
て前記記録データを入力するデジタルメモリとを
備えてなる画像信号記録装置。 A device for storing an image signal expressed in an analog quantity in a digital memory, including an image signal input section into which the image signal is input, and an image signal input section connected to the image signal input section and inputting the image signal from the image signal input section. an A/D converter that quantizes the signal to m levels and converts it into an n-bit digital signal;
a dither pattern signal generating means that is driven in synchronization with the A/D converter and outputs a dither pattern signal; a decoder that is connected to the A/D converter and inputs the P bit in the digital signal to create a gate signal; a gate means for inputting a dither pattern signal and the gate signal; and a gate means for inputting a dither pattern signal and the gate signal; An image signal recording device comprising a calculation means for calculating and outputting recording data, and a digital memory connected to the calculation means and inputting the recording data.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3667286U JPS62147975U (en) | 1986-03-13 | 1986-03-13 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3667286U JPS62147975U (en) | 1986-03-13 | 1986-03-13 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62147975U true JPS62147975U (en) | 1987-09-18 |
Family
ID=30847295
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3667286U Pending JPS62147975U (en) | 1986-03-13 | 1986-03-13 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62147975U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58114569A (en) * | 1981-12-26 | 1983-07-07 | Canon Inc | Picture processing device for color printer |
-
1986
- 1986-03-13 JP JP3667286U patent/JPS62147975U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58114569A (en) * | 1981-12-26 | 1983-07-07 | Canon Inc | Picture processing device for color printer |