JPH0277990U - - Google Patents
Info
- Publication number
- JPH0277990U JPH0277990U JP15684588U JP15684588U JPH0277990U JP H0277990 U JPH0277990 U JP H0277990U JP 15684588 U JP15684588 U JP 15684588U JP 15684588 U JP15684588 U JP 15684588U JP H0277990 U JPH0277990 U JP H0277990U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- data
- outputs
- circuit
- addressing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000001360 synchronised effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Selective Calling Equipment (AREA)
- Radio Relay Systems (AREA)
Description
第１図はこの考案の一実施例を示すブロツク図
、第２図は従来のテレメトリ装置を示すブロツク
図である。
図において、１ａ〜１ｅはアナログ信号、２ａ
，２ｂはマルチプレクサ回路、３はデータ選択信
号、４ａ，４ｂはデータ信号、５は選択回路、６
はコマンド信号、７はアドレス指定回路、８はア
ドレス指定信号、９はＡ／Ｄ入力信号、１０はＡ
／Ｄコンバータ、１１はデイジタル信号、１２は
信号処理回路、１３はテレメトリ信号である。な
お、図中、同一符号は同一または相当部分を示す
。
FIG. 1 is a block diagram showing an embodiment of this invention, and FIG. 2 is a block diagram showing a conventional telemetry device. In the figure, 1a to 1e are analog signals, 2a
, 2b is a multiplexer circuit, 3 is a data selection signal, 4a and 4b are data signals, 5 is a selection circuit, 6
is a command signal, 7 is an address designation circuit, 8 is an address designation signal, 9 is an A/D input signal, 10 is an A
11 is a digital signal, 12 is a signal processing circuit, and 13 is a telemetry signal. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
順次選択し、それぞれデータ信号として出力する
複数のマルチプレクサ回路と、データ選択信号と
コマンド信号を受けてこれらを処理しコマンド信
号で指定された順序でデータ選択信号に同期した
アドレス指定信号を出力するアドレス指定回路と
、上記アドレス指定信号で指定されたデータ信号
を選択しＡ／Ｄ入力信号として出力する切換回路
と、Ａ／Ｄ入力信号を受けてこれをデイジタル信
号に変換するＡ／Ｄコンバータと、上記デイジタ
ル信号を処理しテレメトリ信号として出力する信
号処理回路で構成したテレメトリ装置。 A plurality of multiplexer circuits that sequentially select multiple analog signals according to a data selection signal and output each as a data signal, and a multiplexer circuit that receives a data selection signal and a command signal, processes them, and selects data in the order specified by the command signal. an addressing circuit that outputs an addressing signal synchronized with the signal; a switching circuit that selects the data signal specified by the addressing signal and outputs it as an A/D input signal; A telemetry device comprising an A/D converter that converts into a digital signal, and a signal processing circuit that processes the digital signal and outputs it as a telemetry signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15684588U JPH0277990U (en) | 1988-12-01 | 1988-12-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15684588U JPH0277990U (en) | 1988-12-01 | 1988-12-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0277990U true JPH0277990U (en) | 1990-06-14 |
Family
ID=31435754
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15684588U Pending JPH0277990U (en) | 1988-12-01 | 1988-12-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0277990U (en) |
-
1988
- 1988-12-01 JP JP15684588U patent/JPH0277990U/ja active Pending
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