JPH0426313U - - Google Patents
Info
- Publication number
- JPH0426313U JPH0426313U JP6760890U JP6760890U JPH0426313U JP H0426313 U JPH0426313 U JP H0426313U JP 6760890 U JP6760890 U JP 6760890U JP 6760890 U JP6760890 U JP 6760890U JP H0426313 U JPH0426313 U JP H0426313U
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- input
- frequency
- analog
- analog signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005259 measurement Methods 0.000 claims description 4
- 238000006243 chemical reaction Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Recording Measured Values (AREA)
Description
第１図は本発明の多機能レコーダの第１の実施
例の構成を示すブロツク図、第２図は第１図に示
される実施例の外観構成図、第３図は本発明の多
機能レコーダの第２の実施例の構成を示すブロツ
ク図である。
１１は入力信号処理部、１１ａは増幅器、１１
ｂはサンプルホールド回路、１１ｃはＡ／Ｄ変換
器、２６は制御部、２２は入力電圧表示部、２４
は記録部、２２は入力電圧表示部、２８はキース
イツチ群、３０はメモリ、３２はトリガ回路、３
４は並列／直列インターフエース、３６はリモー
ト端子、ＡＳ１はアナログ信号、ｓｗ１は入力選
択スイツチ、ｓｗ２は表示選択スイツチ、Ｔｉ１
は入力端子である。
FIG. 1 is a block diagram showing the configuration of a first embodiment of a multi-functional recorder of the present invention, FIG. 2 is an external configuration diagram of the embodiment shown in FIG. 1, and FIG. 3 is a multi-functional recorder of the present invention. FIG. 2 is a block diagram showing the configuration of a second embodiment of the present invention. 11 is an input signal processing section, 11a is an amplifier, 11
b is a sample hold circuit, 11c is an A/D converter, 26 is a control section, 22 is an input voltage display section, 24
2 is a recording section, 22 is an input voltage display section, 28 is a key switch group, 30 is a memory, 32 is a trigger circuit, 3
4 is a parallel/serial interface, 36 is a remote terminal, AS 1 is an analog signal, sw1 is an input selection switch, sw2 is a display selection switch, Ti 1
is an input terminal.
補正 平２．９．１９
考案の名称を次のように補正する。
考案の名称 多機能レコーダ
実用新案登録請求の範囲、図面の簡単な説明を
次のように補正する。Amendment 2.9.19 The name of the invention is amended as follows. Name of the invention: Multifunctional recorder The scope of the utility model registration claims and the brief description of the drawings are amended as follows.
【実用新案登録請求の範囲】
アナログ信号が供給されてデジタル信号に変換
するアナログデジタル変換手段と、
入力される上記デジタル信号から上記アナログ
信号の電圧値および／または周波数値を得るため
の電圧測定および／または周波数計数手段と、
該電圧測定および／または周波数計数手段で得
られる電圧値および／または周波数値を数字で表
示する表示部と、
を備えることを特徴とする多機能レコーダ。[Claims for Utility Model Registration] Analog-to-digital conversion means to which an analog signal is supplied and converts it into a digital signal; and voltage measurement and measurement for obtaining the voltage value and/or frequency value of the analog signal from the input digital signal. 1. A multifunctional recorder comprising:/or frequency counting means; and a display section that numerically displays the voltage value and/or frequency value obtained by the voltage measuring and/or frequency counting means.
【図面の簡単な説明】
第１図は本考案の多機能レコーダの第１の実施
例の構成を示すブロツク図、第２図は第１図に示
される実施例の外観構成図、第３図は本考案の多
機能レコーダの第２の実施例の構成を示すブロツ
ク図である。
１１は入力信号処理部、１１ａは増幅器、１１
ｂはサンプルホールド回路、１１ｃはＡ／Ｄ変換
器、２６は制御部、２２は入力電圧表示部、２４
は記録部、２２は入力電圧表示部、２８はキース
イツチ群、３０はメモリ、３２はトリガ回路、３
４は並列／直列インターフエース、３６はリモー
ト端子、ＡＳ１はアナログ信号、ＳＷ１は入力選
択スイツチ、ＳＷ２は表示選択スイツチ、Ｔｉ１
は入力端子である。[Brief Description of the Drawings] Fig. 1 is a block diagram showing the configuration of a first embodiment of the multifunctional recorder of the present invention, Fig. 2 is an external configuration diagram of the embodiment shown in Fig. 1, and Fig. 3 FIG. 2 is a block diagram showing the configuration of a second embodiment of the multifunctional recorder of the present invention. 11 is an input signal processing section, 11a is an amplifier, 11
b is a sample hold circuit, 11c is an A/D converter, 26 is a control section, 22 is an input voltage display section, 24
2 is a recording section, 22 is an input voltage display section, 28 is a key switch group, 30 is a memory, 32 is a trigger circuit, 3
4 is a parallel/serial interface, 36 is a remote terminal, AS 1 is an analog signal, SW1 is an input selection switch, SW2 is a display selection switch, Ti 1
is an input terminal.
Claims (1)
するアナログデジタル変換手段と、 入力される上記デジタル信号から上記アナログ
信号の電圧値および／または周波数値を得るため
の電圧測定および／または周波数計数手段と、 該電圧測定および／または周波数計数手段で得
られる電圧値および／または周波数値を数字で表
示する表示部と、 を備えることを特徴とする多機能レコーダ。[Claims for Utility Model Registration] Analog-to-digital conversion means to which an analog signal is supplied and converts it into a digital signal; and voltage measurement and measurement for obtaining the voltage value and/or frequency value of the analog signal from the input digital signal. 1. A multifunctional recorder comprising:/or frequency counting means; and a display section that numerically displays the voltage value and/or frequency value obtained by the voltage measuring and/or frequency counting means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6760890U JP2536052Y2 (en) | 1990-06-26 | 1990-06-26 | Multi-function recorder |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP6760890U JP2536052Y2 (en) | 1990-06-26 | 1990-06-26 | Multi-function recorder |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0426313U true JPH0426313U (en) | 1992-03-02 |
| JP2536052Y2 JP2536052Y2 (en) | 1997-05-21 |
Family
ID=31601327
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP6760890U Expired - Lifetime JP2536052Y2 (en) | 1990-06-26 | 1990-06-26 | Multi-function recorder |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2536052Y2 (en) |
-
1990
- 1990-06-26 JP JP6760890U patent/JP2536052Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JP2536052Y2 (en) | 1997-05-21 |
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