JPH0174638U - - Google Patents
Info
- Publication number
- JPH0174638U JPH0174638U JP1987169817U JP16981787U JPH0174638U JP H0174638 U JPH0174638 U JP H0174638U JP 1987169817 U JP1987169817 U JP 1987169817U JP 16981787 U JP16981787 U JP 16981787U JP H0174638 U JPH0174638 U JP H0174638U
- Authority
- JP
- Japan
- Prior art keywords
- signal
- output
- digital
- switch
- residual amplifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Description
第１図は本考案に係るアナログデジタル変換器
の一実施例をしめす構成図、第２図は動作を説明
する為のタイムチヤート、第３図は本考案の他の
実施例を示す構成図、第４図は従来のアナログデ
ジタル変換器の構成を示す構成図である。
１……サンプルホールド部、３，７……ＡＤ変
換部、４，５，２６，２７，２８，３６……スイ
ツチ、８……ＤＡ変換部、２０……残差増幅器、
１０，２１〜２３，２５，２９，３２，３５……
抵抗、２４，３１……誤差増幅器、３０，３４…
…コンデンサ、３３……積分器。
FIG. 1 is a block diagram showing one embodiment of an analog-to-digital converter according to the present invention, FIG. 2 is a time chart for explaining the operation, and FIG. 3 is a block diagram showing another embodiment of the present invention. FIG. 4 is a block diagram showing the structure of a conventional analog-to-digital converter. 1... Sample hold section, 3, 7... AD conversion section, 4, 5, 26, 27, 28, 36... Switch, 8... DA conversion section, 20... Residual amplifier,
10, 21-23, 25, 29, 32, 35...
Resistor, 24, 31...Error amplifier, 30, 34...
...Capacitor, 33...Integrator.
Claims (1)
デジタル値をアナログ信号に変換した信号と前記
入力アナログ信号との差信号をスイツチを介して
残差増幅器に入力し、この残差増幅器の出力をデ
ジタル信号に変換した値と前記デジタル値から入
力アナログ信号に対応するデジタル値を求めるア
ナログデジタル変換器において、 前記スイツチが不導通のときの前記残差増幅器
の出力を保持するホールド手段を有し、このホー
ルド手段の出力により前記スイツチが導通してい
るときの前記残差増幅器の出力を補正することを
特徴とするアナログデジタル変換器。[Claims for Utility Model Registration] An input analog signal is converted into a digital value, and a difference signal between the signal obtained by converting this digital value into an analog signal and the input analog signal is inputted to a residual amplifier via a switch. In an analog-to-digital converter that obtains a digital value corresponding to an input analog signal from a value obtained by converting the output of a residual amplifier into a digital signal and the digital value, the output of the residual amplifier is held when the switch is non-conducting. An analog-to-digital converter comprising a hold means, and the output of the residual amplifier when the switch is conductive is corrected by the output of the hold means.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169817U JPH0174638U (en) | 1987-11-06 | 1987-11-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987169817U JPH0174638U (en) | 1987-11-06 | 1987-11-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0174638U true JPH0174638U (en) | 1989-05-19 |
Family
ID=31460213
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987169817U Pending JPH0174638U (en) | 1987-11-06 | 1987-11-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0174638U (en) |
-
1987
- 1987-11-06 JP JP1987169817U patent/JPH0174638U/ja active Pending
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