JPH0345286U - - Google Patents

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Publication number
JPH0345286U
JPH0345286U JP10251889U JP10251889U JPH0345286U JP H0345286 U JPH0345286 U JP H0345286U JP 10251889 U JP10251889 U JP 10251889U JP 10251889 U JP10251889 U JP 10251889U JP H0345286 U JPH0345286 U JP H0345286U
Authority
JP
Japan
Prior art keywords
level
display
converts
output
conversion circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10251889U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10251889U priority Critical patent/JPH0345286U/ja
Publication of JPH0345286U publication Critical patent/JPH0345286U/ja
Pending legal-status Critical Current

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Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はこの考案の一実施例によるピークレベ
ル表示装置１を適用したテープレコーダ５の基本
構成を示すブロツク図、第２図は同実施例にける
テープレコーダ５の表示パネルの外観図、第３図
は同実施例における動作を説明するためのフロー
チヤート、第４図は同実施例における変換テーブ
ルＴＢＬの一例を示す図、第５図は従来の表示装
置の一例を示す図、第６図は第５図に示す表示回
路５２および表示器５３の電気的構成を示す回路
図、第７図は従来の表示装置のその他の例を示す
図である。 １ｂ……ＡＤコンバータ、１ｃ……制御回路。 FIG. 1 is a block diagram showing the basic configuration of a tape recorder 5 to which a peak level display device 1 according to an embodiment of the present invention is applied, FIG. 2 is an external view of the display panel of the tape recorder 5 according to the embodiment, 3 is a flowchart for explaining the operation in the same embodiment, FIG. 4 is a diagram showing an example of the conversion table TBL in the same embodiment, FIG. 5 is a diagram showing an example of a conventional display device, and FIG. 6 5 is a circuit diagram showing the electrical configuration of the display circuit 52 and the display device 53 shown in FIG. 5, and FIG. 7 is a diagram showing another example of the conventional display device. 1b...AD converter, 1c...control circuit.

Claims (1)

【実用新案登録請求の範囲】 (a) 入力信号レベルをデイジタルデータに変換
して出力する変換回路と、 (b) この変換回路の出力を、所定の基準レベル
を単位とするデータに換算する演算手段と、 (c) この演算手段の出力からピーク値を検出す
る検出手段と、 (d) 前記ピーク値を表示レベルに変換する変換
テーブルと、 (e) 前記表示レベルに基づいて表示を行う表示
器と、 を具備することを特徴とするピークレベル表示装
置。[Claims for Utility Model Registration] (a) A conversion circuit that converts an input signal level into digital data and outputs it; (b) An operation that converts the output of this conversion circuit into data whose unit is a predetermined reference level. (c) detection means for detecting a peak value from the output of the calculation means; (d) a conversion table for converting the peak value into a display level; and (e) a display for displaying based on the display level. A peak level display device comprising:
JP10251889U 1989-08-31 1989-08-31 Pending JPH0345286U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10251889U JPH0345286U (en) 1989-08-31 1989-08-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10251889U JPH0345286U (en) 1989-08-31 1989-08-31

Publications (1)

Publication Number Publication Date
JPH0345286U true JPH0345286U (en) 1991-04-25

Family

ID=31651413

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10251889U Pending JPH0345286U (en) 1989-08-31 1989-08-31

Country Status (1)

Country Link
JP (1) JPH0345286U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60150282A (en) * 1984-01-17 1985-08-07 Victor Co Of Japan Ltd Level display method in recording and reproducing device of sound signal

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60150282A (en) * 1984-01-17 1985-08-07 Victor Co Of Japan Ltd Level display method in recording and reproducing device of sound signal

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