JPH0286233U - - Google Patents

Info

Publication number
JPH0286233U
JPH0286233U JP16595488U JP16595488U JPH0286233U JP H0286233 U JPH0286233 U JP H0286233U JP 16595488 U JP16595488 U JP 16595488U JP 16595488 U JP16595488 U JP 16595488U JP H0286233 U JPH0286233 U JP H0286233U
Authority
JP
Japan
Prior art keywords
terminal
voltage source
low
low terminal
differential amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16595488U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP16595488U priority Critical patent/JPH0286233U/ja
Publication of JPH0286233U publication Critical patent/JPH0286233U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示す構成説明図、
第2図は第1図の動作を説明するタイミングチヤ
ート、第3図は従来の装置の一例を示す構成説明
図である。 1……差動増幅器、2……A/D変換器、3…
…演算制御部(CPU)。
FIG. 1 is a configuration explanatory diagram showing an embodiment of the present invention;
FIG. 2 is a timing chart explaining the operation of FIG. 1, and FIG. 3 is a configuration explanatory diagram showing an example of a conventional device. 1...Differential amplifier, 2...A/D converter, 3...
...Arithmetic control unit (CPU).

Claims (1)

【実用新案登録請求の範囲】 ハイ端子およびロー端子を有し、ロー端子が同
相信号電圧源を介して共通電位点に接続された被
測定電圧源と、 一方の入力端子に切換スイツチを介して前記被
測定電圧源のハイ端子およびロー端子が選択的に
接続され、他方の入力端子には前記被測定電圧源
のロー端子が接続された差動増幅器と、 この差動増幅器の出力信号をデジタル信号に変
換するA/D変換器と、 前記切換スイツチが被測定電圧源のハイ端子に
接続されたときの変換出力をDMとしロー端子に
接続されたときの変換出力をDZとしてD=DM
−DZの演算を行う演算制御部、 を設けたことを特徴とするオートゼロA/D変
換装置。
[Claims for Utility Model Registration] A voltage source to be measured having a high terminal and a low terminal, the low terminal of which is connected to a common potential point via an in-phase signal voltage source, and one input terminal connected via a changeover switch. a differential amplifier to which the high terminal and low terminal of the voltage source under test are selectively connected, and the low terminal of the voltage source under test is connected to the other input terminal; and an output signal of the differential amplifier. An A/D converter that converts into a digital signal, and the conversion output when the changeover switch is connected to the high terminal of the voltage source to be measured is DM, and the conversion output when it is connected to the low terminal is DZ, D = DM
- An auto-zero A/D conversion device comprising: an arithmetic control section that performs DZ arithmetic.
JP16595488U 1988-12-22 1988-12-22 Pending JPH0286233U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16595488U JPH0286233U (en) 1988-12-22 1988-12-22

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16595488U JPH0286233U (en) 1988-12-22 1988-12-22

Publications (1)

Publication Number Publication Date
JPH0286233U true JPH0286233U (en) 1990-07-09

Family

ID=31452907

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16595488U Pending JPH0286233U (en) 1988-12-22 1988-12-22

Country Status (1)

Country Link
JP (1) JPH0286233U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51132066A (en) * 1975-05-13 1976-11-16 Mitsubishi Electric Corp A-d converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51132066A (en) * 1975-05-13 1976-11-16 Mitsubishi Electric Corp A-d converter

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