JPS62127128U - - Google Patents
Info
- Publication number
- JPS62127128U JPS62127128U JP1534186U JP1534186U JPS62127128U JP S62127128 U JPS62127128 U JP S62127128U JP 1534186 U JP1534186 U JP 1534186U JP 1534186 U JP1534186 U JP 1534186U JP S62127128 U JPS62127128 U JP S62127128U
- Authority
- JP
- Japan
- Prior art keywords
- collector
- output terminal
- load resistor
- emitter
- clamping transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
- 230000003321 amplification Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Landscapes
- Manipulation Of Pulses (AREA)
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例の回路図、第２図は
従来例の回路図、第３図、第４図はそれぞれ実施
例、従来例の各部の波形変動を示す図である。
１，２……トランジスタ（差動増幅用）、３，
４……負荷抵抗、５，６……トランジスタ（クラ
ンプ用）、７……電源端子、８，９……入力端子
、１０，１１……出力端子、１２……定電流源。
FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is a circuit diagram of a conventional example, and FIGS. 3 and 4 are diagrams showing waveform fluctuations at various parts of the embodiment and the conventional example, respectively. 1, 2...transistor (for differential amplification), 3,
4... Load resistance, 5, 6... Transistor (for clamp), 7... Power supply terminal, 8, 9... Input terminal, 10, 11... Output terminal, 12... Constant current source.
Claims (1)
を接続し、エミツタ側に共通の定電流源を設け、
各コレクタをそれぞれ出力端子とする差動増幅器
の、前記各負荷抵抗の両端をそれぞれクランプ用
トランジスタのコレクタ・エミツタ間に接続し、
該クランプ用トランジスタのベースを対向する出
力端子に接続したことを特徴とするクランプ回路
。 A load resistor is connected to the collector side of each pair of transistors, and a common constant current source is provided on the emitter side.
Connecting both ends of each load resistor of a differential amplifier having each collector as an output terminal between the collector and emitter of a clamping transistor,
A clamp circuit characterized in that the base of the clamping transistor is connected to an opposing output terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1534186U JPS62127128U (en) | 1986-02-04 | 1986-02-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1534186U JPS62127128U (en) | 1986-02-04 | 1986-02-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS62127128U true JPS62127128U (en) | 1987-08-12 |
Family
ID=30806184
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1534186U Pending JPS62127128U (en) | 1986-02-04 | 1986-02-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS62127128U (en) |
-
1986
- 1986-02-04 JP JP1534186U patent/JPS62127128U/ja active Pending
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