JPS6212167A - Manufacture of vertical type semiconductor device with groove section - Google Patents

Manufacture of vertical type semiconductor device with groove section

Info

Publication number
JPS6212167A
JPS6212167A JP14990085A JP14990085A JPS6212167A JP S6212167 A JPS6212167 A JP S6212167A JP 14990085 A JP14990085 A JP 14990085A JP 14990085 A JP14990085 A JP 14990085A JP S6212167 A JPS6212167 A JP S6212167A
Authority
JP
Japan
Prior art keywords
selectively
oxidation
type semiconductor
shaped
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14990085A
Inventor
Yoshitaka Sasaki
Original Assignee
Tdk Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tdk Corp filed Critical Tdk Corp
Priority to JP14990085A priority Critical patent/JPS6212167A/en
Publication of JPS6212167A publication Critical patent/JPS6212167A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE:To form a groove section smoothly, to prevent the generation of the concentration of an electric field and to increase withstanding voltage by selectively oxidizing a semiconductor base body through an opening section for an oxidation-resistant insulating film to shape an oxide film and removing the oxide film through etching to form the groove section. CONSTITUTION:An n-type semiconductor layer 12 in impurity concentration lower than that of an n<+> type semiconductor base body 11 is shaped onto the semiconductor base body 11. An oxide film 13 is formed, and an oxidation-resistant insulating film 14 is shaped selectively. The n-type semiconductor layer 12 is oxidized selectively through opening sections 14a for the oxidation-resistant insulating film 14 to selectively form oxide films 15. The oxidation-resistant insulating film 14 is removed through etching, a p-type diffusion layer 16 is shaped in a self-alignment manner while using the thick oxide film 15 as a mask, an n<+> type diffusion layer 17 is formed selectively, an oxide film 18 is shaped, a resist film 19 is formed selectively and etched, and the oxide films 15 are gotten rid of, thus shaping groove sections. The shapes of the contours of the groove sections are smoothed, and gate oxide films 21 and polycrystalline silicon films 22 are formed.
JP14990085A 1985-07-10 1985-07-10 Manufacture of vertical type semiconductor device with groove section Pending JPS6212167A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14990085A JPS6212167A (en) 1985-07-10 1985-07-10 Manufacture of vertical type semiconductor device with groove section

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14990085A JPS6212167A (en) 1985-07-10 1985-07-10 Manufacture of vertical type semiconductor device with groove section

Publications (1)

Publication Number Publication Date
JPS6212167A true JPS6212167A (en) 1987-01-21

Family

ID=15485060

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14990085A Pending JPS6212167A (en) 1985-07-10 1985-07-10 Manufacture of vertical type semiconductor device with groove section

Country Status (1)

Country Link
JP (1) JPS6212167A (en)

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1993003502A1 (en) * 1991-07-26 1993-02-18 Nippondenso Co., Ltd. Method of producing vertical mosfet
US5298442A (en) * 1988-12-27 1994-03-29 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
EP0675529A2 (en) * 1994-03-30 1995-10-04 Nippondenso Co., Ltd. Process for manufacturing vertical MOS transistors
US5470770A (en) * 1994-03-31 1995-11-28 Nippondenso Co., Ltd. Manufacturing method of semiconductor device
US5672524A (en) * 1995-08-01 1997-09-30 Advanced Micro Devices, Inc. Three-dimensional complementary field effect transistor process
US5696396A (en) * 1993-11-12 1997-12-09 Nippondenso Co., Ltd. Semiconductor device including vertical MOSFET structure with suppressed parasitic diode operation
US5698880A (en) * 1994-03-31 1997-12-16 Nippondenso Co., Ltd. Semiconductor device having a groove with a curved part formed on its side surface
US5714781A (en) * 1995-04-27 1998-02-03 Nippondenso Co., Ltd. Semiconductor device having a gate electrode in a grove and a diffused region under the grove
US5747851A (en) * 1995-09-29 1998-05-05 Nippondenso Co., Ltd. Semiconductor device with reduced breakdown voltage between the gate electrode and semiconductor surface
US5780324A (en) * 1994-03-30 1998-07-14 Denso Corporation Method of manufacturing a vertical semiconductor device
US5925911A (en) * 1995-04-26 1999-07-20 Nippondenso Co., Ltd. Semiconductor device in which defects due to LOCOS or heat treatment are suppressed
US5998268A (en) * 1996-09-30 1999-12-07 Denso Corporation Manufacturing method of semiconductor device with a groove
US6015737A (en) * 1991-07-26 2000-01-18 Denso Corporation Production method of a vertical type MOSFET
US6100140A (en) * 1995-07-04 2000-08-08 Nippondenso Co., Ltd. Manufacturing method of semiconductor device
US6172552B1 (en) 1997-10-17 2001-01-09 Nec Corporation FET device for use in solid-state relay
US6316300B1 (en) 1998-09-16 2001-11-13 Denso Corporation Method of manufacturing a semiconductor device having an oxidation process for selectively forming an oxide film
US6429481B1 (en) 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US6603173B1 (en) * 1991-07-26 2003-08-05 Denso Corporation Vertical type MOSFET
DE19640443B4 (en) * 1995-09-29 2005-07-07 Denso Corp., Kariya Semiconductor device and its manufacturing method

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5298442A (en) * 1988-12-27 1994-03-29 Siliconix Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
US6627950B1 (en) 1988-12-27 2003-09-30 Siliconix, Incorporated Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
US6603173B1 (en) * 1991-07-26 2003-08-05 Denso Corporation Vertical type MOSFET
EP0550770A1 (en) * 1991-07-26 1993-07-14 Nippondenso Co., Ltd. Method of producing vertical mosfet
WO1993003502A1 (en) * 1991-07-26 1993-02-18 Nippondenso Co., Ltd. Method of producing vertical mosfet
US5460985A (en) * 1991-07-26 1995-10-24 Ipics Corporation Production method of a verticle type MOSFET
US6015737A (en) * 1991-07-26 2000-01-18 Denso Corporation Production method of a vertical type MOSFET
US5696396A (en) * 1993-11-12 1997-12-09 Nippondenso Co., Ltd. Semiconductor device including vertical MOSFET structure with suppressed parasitic diode operation
EP0675529A3 (en) * 1994-03-30 1998-06-03 Denso Corporation Process for manufacturing vertical MOS transistors
EP0675529A2 (en) * 1994-03-30 1995-10-04 Nippondenso Co., Ltd. Process for manufacturing vertical MOS transistors
US5776812A (en) * 1994-03-30 1998-07-07 Nippondenso Co., Ltd. Manufacturing method of semiconductor device
US5780324A (en) * 1994-03-30 1998-07-14 Denso Corporation Method of manufacturing a vertical semiconductor device
US5698880A (en) * 1994-03-31 1997-12-16 Nippondenso Co., Ltd. Semiconductor device having a groove with a curved part formed on its side surface
EP0675530A3 (en) * 1994-03-31 1997-10-08 Nippon Denso Co Manufacturing method of a field effect semiconductor device.
US5470770A (en) * 1994-03-31 1995-11-28 Nippondenso Co., Ltd. Manufacturing method of semiconductor device
US5925911A (en) * 1995-04-26 1999-07-20 Nippondenso Co., Ltd. Semiconductor device in which defects due to LOCOS or heat treatment are suppressed
US5714781A (en) * 1995-04-27 1998-02-03 Nippondenso Co., Ltd. Semiconductor device having a gate electrode in a grove and a diffused region under the grove
US6100140A (en) * 1995-07-04 2000-08-08 Nippondenso Co., Ltd. Manufacturing method of semiconductor device
US5672524A (en) * 1995-08-01 1997-09-30 Advanced Micro Devices, Inc. Three-dimensional complementary field effect transistor process
DE19640443B4 (en) * 1995-09-29 2005-07-07 Denso Corp., Kariya Semiconductor device and its manufacturing method
US5747851A (en) * 1995-09-29 1998-05-05 Nippondenso Co., Ltd. Semiconductor device with reduced breakdown voltage between the gate electrode and semiconductor surface
DE19742181B4 (en) * 1996-09-30 2006-05-18 Denso Corp., Kariya Manufacturing method for a semiconductor device
US5998268A (en) * 1996-09-30 1999-12-07 Denso Corporation Manufacturing method of semiconductor device with a groove
US6172552B1 (en) 1997-10-17 2001-01-09 Nec Corporation FET device for use in solid-state relay
US8044463B2 (en) 1997-11-14 2011-10-25 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US6828195B2 (en) 1997-11-14 2004-12-07 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US6429481B1 (en) 1997-11-14 2002-08-06 Fairchild Semiconductor Corporation Field effect transistor and method of its manufacture
US7696571B2 (en) 1997-11-14 2010-04-13 Fairchild Semiconductor Corporation Method of manufacturing a trench transistor having a heavy body region
US6316300B1 (en) 1998-09-16 2001-11-13 Denso Corporation Method of manufacturing a semiconductor device having an oxidation process for selectively forming an oxide film

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