JPS6211751B2 - - Google Patents

Info

Publication number
JPS6211751B2
JPS6211751B2 JP2136480A JP2136480A JPS6211751B2 JP S6211751 B2 JPS6211751 B2 JP S6211751B2 JP 2136480 A JP2136480 A JP 2136480A JP 2136480 A JP2136480 A JP 2136480A JP S6211751 B2 JPS6211751 B2 JP S6211751B2
Authority
JP
Japan
Prior art keywords
memory
unit
address
circuit
speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP2136480A
Other languages
English (en)
Japanese (ja)
Other versions
JPS56118157A (en
Inventor
Tooru Asatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP2136480A priority Critical patent/JPS56118157A/ja
Publication of JPS56118157A publication Critical patent/JPS56118157A/ja
Publication of JPS6211751B2 publication Critical patent/JPS6211751B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)
JP2136480A 1980-02-21 1980-02-21 Memory unit Granted JPS56118157A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2136480A JPS56118157A (en) 1980-02-21 1980-02-21 Memory unit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2136480A JPS56118157A (en) 1980-02-21 1980-02-21 Memory unit

Publications (2)

Publication Number Publication Date
JPS56118157A JPS56118157A (en) 1981-09-17
JPS6211751B2 true JPS6211751B2 (US20110158925A1-20110630-C00042.png) 1987-03-14

Family

ID=12053031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2136480A Granted JPS56118157A (en) 1980-02-21 1980-02-21 Memory unit

Country Status (1)

Country Link
JP (1) JPS56118157A (US20110158925A1-20110630-C00042.png)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0223360U (US20110158925A1-20110630-C00042.png) * 1988-07-28 1990-02-15

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62110799U (US20110158925A1-20110630-C00042.png) * 1985-12-27 1987-07-15
JP4583981B2 (ja) * 2005-03-16 2010-11-17 株式会社リコー 画像処理装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0223360U (US20110158925A1-20110630-C00042.png) * 1988-07-28 1990-02-15

Also Published As

Publication number Publication date
JPS56118157A (en) 1981-09-17

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