JPS6190245U - - Google Patents

Info

Publication number
JPS6190245U
JPS6190245U JP1984175211U JP17521184U JPS6190245U JP S6190245 U JPS6190245 U JP S6190245U JP 1984175211 U JP1984175211 U JP 1984175211U JP 17521184 U JP17521184 U JP 17521184U JP S6190245 U JPS6190245 U JP S6190245U
Authority
JP
Japan
Prior art keywords
semiconductor device
utility
scope
external connection
registration request
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984175211U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984175211U priority Critical patent/JPS6190245U/ja
Publication of JPS6190245U publication Critical patent/JPS6190245U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP1984175211U 1984-11-19 1984-11-19 Pending JPS6190245U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984175211U JPS6190245U (enExample) 1984-11-19 1984-11-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984175211U JPS6190245U (enExample) 1984-11-19 1984-11-19

Publications (1)

Publication Number Publication Date
JPS6190245U true JPS6190245U (enExample) 1986-06-12

Family

ID=30732815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984175211U Pending JPS6190245U (enExample) 1984-11-19 1984-11-19

Country Status (1)

Country Link
JP (1) JPS6190245U (enExample)

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