JPS61109148U - - Google Patents

Info

Publication number
JPS61109148U
JPS61109148U JP1984193736U JP19373684U JPS61109148U JP S61109148 U JPS61109148 U JP S61109148U JP 1984193736 U JP1984193736 U JP 1984193736U JP 19373684 U JP19373684 U JP 19373684U JP S61109148 U JPS61109148 U JP S61109148U
Authority
JP
Japan
Prior art keywords
lead
plan
view
wire bonding
utility
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1984193736U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1984193736U priority Critical patent/JPS61109148U/ja
Publication of JPS61109148U publication Critical patent/JPS61109148U/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Wire Bonding (AREA)
JP1984193736U 1984-12-21 1984-12-21 Pending JPS61109148U (enExample)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1984193736U JPS61109148U (enExample) 1984-12-21 1984-12-21

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1984193736U JPS61109148U (enExample) 1984-12-21 1984-12-21

Publications (1)

Publication Number Publication Date
JPS61109148U true JPS61109148U (enExample) 1986-07-10

Family

ID=30751162

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1984193736U Pending JPS61109148U (enExample) 1984-12-21 1984-12-21

Country Status (1)

Country Link
JP (1) JPS61109148U (enExample)

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