JPS6183039U - - Google Patents
Info
- Publication number
- JPS6183039U JPS6183039U JP16768984U JP16768984U JPS6183039U JP S6183039 U JPS6183039 U JP S6183039U JP 16768984 U JP16768984 U JP 16768984U JP 16768984 U JP16768984 U JP 16768984U JP S6183039 U JPS6183039 U JP S6183039U
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- recess
- semiconductor
- semiconductor chip
- mounting agent
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 9
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の一実施例に係る半導体リード
フレームを用いたマウント工程を示す断面図、第
２図は同じく平面図、第３図は従来の半導体リー
ドフレームを用いたマウント工程を示す断面図、
第４図は同じく平面図、第５図は第３図の工程に
於けるクラツク発生状態を示す断面図、第６図は
同じくマウント剤の這い上がり状態を示す断面図
である。
２１…リードフレーム、２２…ベツド部、２３
…凹部、２４…開口部、２５…段部、２６…半導
体チツプ、２７…マウント剤、２８…リード部、
２９…金ワイヤ。
FIG. 1 is a cross-sectional view showing a mounting process using a semiconductor lead frame according to an embodiment of the present invention, FIG. 2 is a plan view, and FIG. 3 is a cross-sectional view showing a mounting process using a conventional semiconductor lead frame. figure,
FIG. 4 is a plan view, FIG. 5 is a cross-sectional view showing how cracks occur in the process shown in FIG. 3, and FIG. 6 is a cross-sectional view showing how the mounting agent creeps up. 21...Lead frame, 22...Bed part, 23
... recess, 24... opening, 25... step, 26... semiconductor chip, 27... mounting agent, 28... lead part,
29...Gold wire.
Claims (1)
体リードフレームに於いて、前記ベツド部内に前
記半導体チツプ収納用の凹部を設けると共に、こ
の凹部内にマウント剤付着用の段部を設けたこと
を特徴とする半導体リードフレーム。 (2) 前記マウント剤は、前記半導体チツプの電
極部の下部に対応して前記段部に付着される実用
新案登録請求の範囲第１項記載の半導体リードフ
レーム。[Claims for Utility Model Registration] (1) In a semiconductor lead frame in which a semiconductor chip is fixed to a bed part, a recess for storing the semiconductor chip is provided in the bed part, and a recess for attaching a mounting agent is provided in the recess. A semiconductor lead frame characterized by having a stepped portion. (2) The semiconductor lead frame according to claim 1, wherein the mounting agent is attached to the step portion corresponding to the lower part of the electrode portion of the semiconductor chip.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16768984U JPS6183039U (en) | 1984-11-05 | 1984-11-05 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16768984U JPS6183039U (en) | 1984-11-05 | 1984-11-05 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6183039U true JPS6183039U (en) | 1986-06-02 |
Family
ID=30725479
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16768984U Pending JPS6183039U (en) | 1984-11-05 | 1984-11-05 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6183039U (en) |
-
1984
- 1984-11-05 JP JP16768984U patent/JPS6183039U/ja active Pending