JPS6182452A - 電子部品の製造方法 - Google Patents
電子部品の製造方法Info
- Publication number
- JPS6182452A JPS6182452A JP59204729A JP20472984A JPS6182452A JP S6182452 A JPS6182452 A JP S6182452A JP 59204729 A JP59204729 A JP 59204729A JP 20472984 A JP20472984 A JP 20472984A JP S6182452 A JPS6182452 A JP S6182452A
- Authority
- JP
- Japan
- Prior art keywords
- lead frame
- oxide film
- plates
- heat sink
- exposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 title description 9
- 239000011347 resin Substances 0.000 claims abstract description 12
- 229920005989 resin Polymers 0.000 claims abstract description 12
- 230000001590 oxidative effect Effects 0.000 claims abstract description 4
- 239000000463 material Substances 0.000 claims description 5
- 238000000465 moulding Methods 0.000 abstract description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 abstract description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052802 copper Inorganic materials 0.000 abstract description 3
- 239000010949 copper Substances 0.000 abstract description 3
- 239000001301 oxygen Substances 0.000 abstract description 3
- 229910052760 oxygen Inorganic materials 0.000 abstract description 3
- 230000000694 effects Effects 0.000 abstract 1
- 239000004065 semiconductor Substances 0.000 description 20
- 238000000034 method Methods 0.000 description 15
- 239000008188 pellet Substances 0.000 description 10
- 230000003647 oxidation Effects 0.000 description 8
- 238000007254 oxidation reaction Methods 0.000 description 8
- 238000007747 plating Methods 0.000 description 5
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 230000017525 heat dissipation Effects 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 238000005520 cutting process Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 241001385733 Aesculus indica Species 0.000 description 1
- 241000238557 Decapoda Species 0.000 description 1
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 238000004080 punching Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 238000011179 visual inspection Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
- H01L21/4814—Conductive parts
- H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
- H01L21/4835—Cleaning, e.g. removing of solder
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59204729A JPS6182452A (ja) | 1984-09-29 | 1984-09-29 | 電子部品の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59204729A JPS6182452A (ja) | 1984-09-29 | 1984-09-29 | 電子部品の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6182452A true JPS6182452A (ja) | 1986-04-26 |
| JPH0422340B2 JPH0422340B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-04-16 |
Family
ID=16495342
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59204729A Granted JPS6182452A (ja) | 1984-09-29 | 1984-09-29 | 電子部品の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6182452A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10478880B2 (en) | 2015-04-28 | 2019-11-19 | Aws Schaefer Technologie Gmbh | Method for induction bend forming a compression-resistant pipe having a large wall thickness and a large diameter |
-
1984
- 1984-09-29 JP JP59204729A patent/JPS6182452A/ja active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US10478880B2 (en) | 2015-04-28 | 2019-11-19 | Aws Schaefer Technologie Gmbh | Method for induction bend forming a compression-resistant pipe having a large wall thickness and a large diameter |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0422340B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-04-16 |
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