JPS6179226A - Pattern forming method - Google Patents
Pattern forming methodInfo
- Publication number
- JPS6179226A JPS6179226A JP59200423A JP20042384A JPS6179226A JP S6179226 A JPS6179226 A JP S6179226A JP 59200423 A JP59200423 A JP 59200423A JP 20042384 A JP20042384 A JP 20042384A JP S6179226 A JPS6179226 A JP S6179226A
- Authority
- JP
- Japan
- Prior art keywords
- resist
- film
- layer
- mask
- ray
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 20
- 239000000178 monomer Substances 0.000 claims abstract description 7
- 238000000151 deposition Methods 0.000 claims 1
- 238000005530 etching Methods 0.000 abstract description 10
- -1 polymethylsiloxane Polymers 0.000 abstract description 8
- 239000001301 oxygen Substances 0.000 abstract description 5
- 229910052760 oxygen Inorganic materials 0.000 abstract description 5
- 238000000992 sputter etching Methods 0.000 abstract description 3
- 239000007789 gas Substances 0.000 abstract description 2
- 239000012808 vapor phase Substances 0.000 abstract 1
- 239000010410 layer Substances 0.000 description 30
- 230000035945 sensitivity Effects 0.000 description 3
- 239000002356 single layer Substances 0.000 description 3
- 238000001015 X-ray lithography Methods 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 229910052582 BN Inorganic materials 0.000 description 1
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000006096 absorbing agent Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920003229 poly(methyl methacrylate) Polymers 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 229920006254 polymer film Polymers 0.000 description 1
- 239000004926 polymethyl methacrylate Substances 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の利用分野〕
本発明は光あるいはＸ線リソグラフィに係り、特に高感
度、高解像度で工程の簡略な２層レジストプロセスに好
適なパターン形成方法に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to optical or X-ray lithography, and particularly to a pattern forming method suitable for a two-layer resist process with high sensitivity, high resolution, and simple steps.
従来のパターン形成方法においては、単層レジストを用
いたりソグラフィの解像限界を越えて、１７７１１１以
下の微細加工を達成するための多層レジストプロセスが
開発されている。（Ｗ、Ｔ、Ｌｉｕｅｔ、 ａｌ、 ”
Ｐｏ１ｙ ｍｅｔｈｙｌ ｍｅｔｈａｃｒｙｌａｔｅ
ｒｅｓｉｓｔｓｅｎｓｉｔｉｖｉｔｙ ｅｎｈａｎｃｅ
ｍｅｎｔ ｉｎ Ｘ−ｒａｙ ｌｉｔｈｏｇｒａｐｈｙ
ｂｙ ｉｎ ５ｉｔｕ ｐｏｌｙｍｅｒｉｚａｔｊ、ｏ
ｎ”（Ａｐｐｌ、 Ｐｈｙｓ。In conventional pattern forming methods, multilayer resist processes have been developed to achieve microfabrication of 177111 or less by using a single layer resist or exceeding the resolution limit of lithography. (W,T,Liuet,al,”
Poly methyl methacrylate
resist sensitivity enhance
ment in X-ray lithography
by in 5itu polymerizatj, o
n” (Appl, Phys.
Ｌｅｔｔ、、１５． Ｍａｙ、 １９８４． ｐＦ７ｊ
〜メツ夕）参照）現状では、中間層にシリコン酸化物
などを取り入れた３層構造が広く採用されている。しか
し、３層構造の場合、工程が複雑であることが最大の問
題となっており、高性能な２層レジストプロセスの開発
が待たれていた。Lett,,15. May, 1984. pF7j
~Metsuyu) Currently, a three-layer structure incorporating silicon oxide or the like in the intermediate layer is widely used. However, in the case of a three-layer structure, the biggest problem is that the process is complicated, and the development of a high-performance two-layer resist process has been awaited.
しかし、２層レジストの主な技術的難点は、１つには、
２層レジストの塗布性の悪さにある。すなわち下層レジ
ストを塗布した後、その上に上層レジストを塗布すると
きに両者が混り合ってしまうことである。２つには、下
層レジストエツチング時の上層の耐性不足、すなわち上
層レジストをパターン化した後、該上層レジストをマス
クとして下層レジストをエツチングするときに、上層レ
ジストもエツチングされてしまうことである。However, the main technical difficulties of two-layer resists are:
The problem lies in the poor coating properties of the two-layer resist. That is, when a lower resist layer is applied and an upper resist layer is applied thereon, the two resists become mixed. The second problem is the lack of resistance of the upper layer when etching the lower resist, that is, when the upper resist is patterned and the lower resist is etched using the upper resist as a mask, the upper resist is also etched.
なお、上記の説明では多層レジストに関して述べたが、
単層レジストの場合においても、微細加工するためには
該レジストを薄く被着させるので、パターン化したレジ
ストをマスクとしてレジスト下の層（以下レジスト下層
と記す）をエツチングする場合、薄く形成したレジスト
もこのときエツチングされてしまい、微細加工が困難で
ある問題があった６
〔発明の目的〕
本発明の目的は、レジスト下層のエツチング時のレジス
トの耐性の高いパターン形成方法を提供することにある
。さらに、高解像力で、３層レジストプロセスよりも工
程の簡略な２層レジストプロセスを用いる場合において
は、下層レジストのエツチング時の上層レジストあ耐性
が高いと共に、上層レジストを下層レジスト上に安定に
積層し得るパターン形成方法を提供するにある。In addition, although the above explanation was about multilayer resist,
Even in the case of a single-layer resist, the resist must be thinly deposited for microfabrication, so when etching the layer under the resist (hereinafter referred to as "resist lower layer") using a patterned resist as a mask, the thinly formed resist There was a problem in that the resist was etched at this time, making microfabrication difficult.6 [Object of the Invention] An object of the present invention is to provide a pattern forming method in which the resist has high resistance during etching of the lower layer of the resist. . Furthermore, when using a two-layer resist process with high resolution and a simpler process than a three-layer resist process, the upper resist has high resistance to etching the lower resist, and the upper resist can be stably stacked on the lower resist. The purpose of the present invention is to provide a pattern forming method that can be used.
Ｘ線を露光することにより、レジスト下層の上に、モノ
マーの放射線重合膜を形成するものである。By exposing to X-rays, a radiation-polymerized monomer film is formed on the resist lower layer.
モノマーの放射線重合膜は通常の高分子膜に比べて緻密
で固く、エツチング耐性に優れているので、従来法のよ
うに、レジスト下層のエツチング時にレジストがエツチ
ングされるのを防止し得る。さらに、従来のパターン形
成方法のように、溶液を使用しないので、レジストを２
層以上に積層する場合は、下層レジスト及び上層レジス
トが混り合うことなく、上層レジストの塗布を良好に行
える。The radiation-polymerized monomer film is denser, harder, and more resistant to etching than ordinary polymer films, so it can prevent the resist from being etched when the underlying layer of the resist is etched, unlike conventional methods. Furthermore, unlike conventional patterning methods, no solution is used, so the resist is
When laminating more than one layer, the upper resist can be coated satisfactorily without mixing the lower resist and the upper resist.
本発明の一実施例を第１図（Ａ）〜（Ｄ）を用いて説明
する。なお、本実施例はレジストを２層に積層する例で
ある。まず第１図（Ａ）に示すように、Ｓｉウェーハ１
にＡａ膜２を厚さ１層被着した上に下層レジストとして
ＡＺ１３５０Ｊ膜（Ｓ ｈｉｐｌｅｙ社製）３を厚さ２
岬スピン塗布し、２００℃、３０分のベークを行なう。An embodiment of the present invention will be described using FIGS. 1(A) to 1(D). Note that this embodiment is an example in which two layers of resist are laminated. First, as shown in FIG. 1(A), a Si wafer 1
A one-layer Aa film 2 was deposited on the substrate, and then an AZ1350J film (manufactured by Shipley) 3 was applied as a lower resist layer to a thickness of 2.
Misaki spin coating was performed and baked at 200° C. for 30 minutes.
次に、第１図（Ｂ）に示すように、前記試料をトリメチ
ルシロキサン（Ｓ １２ Ｃｓ Ｈｌｓ ｏ ） ４の
モツマ−気体中でＸ線マスク６を介してＸ線７により露
光する。Ｘ線マスク６は、厚さ１＃Ｉ１１の窒化ホウ素
と厚さ３＃ＩＩｌのＰＩＱ （日立化成製）の複合膜に
厚さ０．５１Ｍの金でＸ線吸収体パターンを形成したも
のを用いた。Ｘ線マスク６とウェーハ１との間隔Ｑは２
０−とした。Ｘ線波長は５．４人（ＭａＬＤｔ）であり
、照射量は５０ｍＪ／ｌＪである。上記Ｘ線露光により
、パターン化された重合体ポリメチルシロキサン膜５を
得る。この時の該ポリメチルシロキサン膜５の膜厚は０
．０５．ｃａであった。Next, as shown in FIG. 1(B), the sample is exposed to X-rays 7 through an X-ray mask 6 in a motumer gas of trimethylsiloxane (S 12 Cs Hls o ) 4 . The X-ray mask 6 is made of a composite film of boron nitride with a thickness of 1#I11 and PIQ (manufactured by Hitachi Chemical) with a thickness of 3#IIl, with an X-ray absorber pattern formed with gold with a thickness of 0.51M. there was. The distance Q between the X-ray mask 6 and the wafer 1 is 2
It was set to 0-. The X-ray wavelength is 5.4 (MaLDt), and the irradiation dose is 50 mJ/lJ. By the above X-ray exposure, a patterned polymer polymethylsiloxane film 5 is obtained. At this time, the film thickness of the polymethylsiloxane film 5 is 0.
．． 05. It was ca.
次に、第１図（Ｃ）に示すように、酸素イオン８による
エツチングにより、ポリメチルシロキサン膜５をマスク
にして、下層レジストＡ Ｚ １３５０ Ｊ膜３をエツ
チングする。この時、上層レジストのポリメチルシロキ
サン膜５の上記イオンエツチングに対する耐性は高く、
３０分のエツチング後の膜厚減少はほとんど見られなか
った。Next, as shown in FIG. 1C, the lower resist AZ 1350 J film 3 is etched using the polymethylsiloxane film 5 as a mask by etching with oxygen ions 8. At this time, the polymethylsiloxane film 5 of the upper resist layer has high resistance to the ion etching.
Almost no decrease in film thickness was observed after 30 minutes of etching.
次に、前記パターン化された２層レジスト膜９をマスク
にしてＡｆｌ膜２をドライエツチングする。Next, the Afl film 2 is dry etched using the patterned two-layer resist film 9 as a mask.
最後に２層レジスト膜９を酸素プラズマにより同時に灰
化除去して、第１図（Ｄ）に示すように、パターン化し
たＡｌｌ膜２′を得る。Finally, the two-layer resist film 9 is simultaneously ashed and removed using oxygen plasma to obtain a patterned All film 2' as shown in FIG. 1(D).
このように、本実施例によれば、高いＸ線感度で、かつ
下層レジストと混じり合うことなく、ポリメチルシロキ
サンを重合させることができ、酸素イオンエツチングの
マスク用上層レジストを形成することができた。As described above, according to this example, polymethylsiloxane can be polymerized with high X-ray sensitivity and without mixing with the lower layer resist, and an upper layer resist for an oxygen ion etching mask can be formed. Ta.
なお１本実施例では２層レジストプロセスを例に挙げて
説明したが、これに限定されず、単層レジストプロセス
あるいは３層以上積層するプロセスに用いてもよいこと
はいうまでもない。Although the present embodiment has been described using a two-layer resist process as an example, the present invention is not limited to this, and it goes without saying that it may be used in a single-layer resist process or a process in which three or more layers are laminated.
本発明によれば、レジスト下層とのエツチング選択性の
高いレジストを形成することができるので、レジストプ
ロセスの高精度化、高信頼度化に顕著な効果がある。According to the present invention, it is possible to form a resist that has high etching selectivity with respect to the resist lower layer, and therefore has a remarkable effect on increasing the accuracy and reliability of the resist process.
第１図（Ａ）〜（Ｄ）は本発明の一実施例の工程と試料
の断面を示す図である。
１・・・Ｓｉウェハ ２・・・Ａｆｌ膜３−Ａ
Ｚ １３５０ Ｊ膜
４・・・トリメチルシロキサン膜
５・・・ポリメチルシロキサン膜
６・・・Ｘ線マスク ７・・・Ｘ線８・・・酸素
イオン
９・・・２層レジスト膜FIGS. 1(A) to 1(D) are diagrams showing the steps of an embodiment of the present invention and a cross section of a sample. 1...Si wafer 2...Afl film 3-A
Z 1350 J film 4...Trimethylsiloxane film 5...Polymethylsiloxane film 6...X-ray mask 7...X-ray 8...Oxygen ion 9...Two-layer resist film
Claims (2)
またはＸ線を露光することにより、モノマーの放射線重
合膜を堆積させて所定のパターンを形成することを特徴
とするパターン形成方法。(1) A pattern forming method characterized by forming a predetermined pattern by depositing a radiation-polymerized film of a monomer by exposing it to light or X-rays through a light-shielding mask in a monomer gas phase atmosphere.
に堆積させ、多層レジストを形成することを特徴とする
特許請求の範囲第１項記載のパターン形成方法。(2) The pattern forming method according to claim 1, wherein a radiation-polymerized film of the monomer is deposited on a base resist film to form a multilayer resist.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59200423A JPS6179226A (en) | 1984-09-27 | 1984-09-27 | Pattern forming method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59200423A JPS6179226A (en) | 1984-09-27 | 1984-09-27 | Pattern forming method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6179226A true JPS6179226A (en) | 1986-04-22 |
Family
ID=16424055
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59200423A Pending JPS6179226A (en) | 1984-09-27 | 1984-09-27 | Pattern forming method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6179226A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5364742A (en) * | 1992-09-21 | 1994-11-15 | International Business Machines Corporation | Micro-miniature structures and method of fabrication thereof |
| CN100365510C (en) * | 2003-01-15 | 2008-01-30 | 友达光电股份有限公司 | Method of making metal pattern |
-
1984
- 1984-09-27 JP JP59200423A patent/JPS6179226A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5364742A (en) * | 1992-09-21 | 1994-11-15 | International Business Machines Corporation | Micro-miniature structures and method of fabrication thereof |
| CN100365510C (en) * | 2003-01-15 | 2008-01-30 | 友达光电股份有限公司 | Method of making metal pattern |
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