JPS6175688A - Detection circuit of horizontal overlap position in teletext - Google Patents

Abstract

PURPOSE:To lighten the burden imposed on a microcomputer and to prevent the occurrence o an error in transmission contents by forming a detection circuit with a synchronous separator circuit of a composit synchronizing signal, vertical/ horizontal separator circuit, the 1st counter for counting a horizontal reference clock signal and the 2nd counter for counting a horizontal synchronizing signal between a latch circuit and a normal section. CONSTITUTION:A latch circuit 6 is cleared by a vertical synchronizing signal V from a vertical/horizontal separator circuit 3, and set at the first 0.08 H after this clearing, namely, at 10 H in the an odd field or 0.08 H in terms of 273 H in an even field. The clearing of the 2nd counter 7 is reflected by the output of the latch circuit 6, and a horizontal synchronizing signal of the vertical/horizontal separator circuit 3 is transmitted to a clock terminal as a clock signal which is counted. Namely, the pulse at the first 0.08 H, after the counter is cleared by the vertical synchronizing signal, becomes 10 H in the odd field or 273 H in the even field. Accordingly, pulses after 10 H and 273 H are detected as being related each other.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application]
The present invention relates to a horizontal superimposition position detection circuit in teletext broadcasting, which detects H to 21H and even fields 273H to 284H as being mutually related.

More specifically, in a video signal, the pulse width of the horizontal synchronizing signal in the equivalent pulse is 0.048, while the width of the horizontal synchronizing signal is 1
The pulse width of the horizontal synchronizing signal in the normal section is 0.088. The present invention relates to a circuit that detects the horizontal superimposition position while taking advantage of the fact that the pulse widths of the two pulse widths are different, and taking the correlation between the odd and even fields.

[Prior Art] Conventionally, in teletext broadcasting, when extracting a character signal from an input video signal, the character signal was simply extracted, and then the signal content was determined by a microcomputer.

This places a burden on the microcomputer, and since there is no correlation between the H positions of the odd and even fields of the video signal, there are problems such as transmission malfunctions.

[Problems to be Solved by the Invention] The present invention aims to reduce the burden on the microcomputer and to reduce errors in transmitted contents as much as possible by defining the H position.

[Means for solving the problems] The present invention has been made to achieve the above objects, and
A sync separation circuit for separating a composite sync signal obtained by removing a video signal from a video signal, and a vertical and horizontal separation circuit for further separating the composite sync signal of this sync separation circuit into a vertical sync signal and a horizontal sync signal. , a first counter that counts the reference clock signal only during the horizontal synchronization signal period and outputs an output when the count exceeds the horizontal synchronization signal period during the equivalent pulse, and a latch that is set by the output of this first counter. The second counter is set by the output of the latch circuit and counts horizontal synchronizing signals in the normal period.

[Operation] First, only the composite sync signal is extracted from the video signal by the sync separation circuit, and then the vertical and horizontal sync signals are separated by the vertical and horizontal separation circuits. Also, the first
The counter counts the reference clock when it is the horizontal synchronization signal of the composite synchronization signal, but only when it exceeds 0.048 during the equivalent pulse, that is, 0.0 in the normal interval.
Only in the case of 8H, the first counter outputs the signal and latches the latch circuit. This latch circuit is cleared by the vertical synchronization signal and set by the first 0.08H signal thereafter. The output of this latch circuit clears the second counter, making it possible to count horizontal synchronization signals.

In other words, since the second counter counts only the signal of 0.08H, it is possible to detect that the odd field after 108 and the even field after 273H are related to each other.

[Example] Hereinafter, one embodiment of the present invention will be described based on the drawings.

In FIG. 1, (1) is a video signal output circuit, and a synchronization separation circuit (2) for obtaining a composite synchronization signal is coupled to the output side of this video signal output circuit (1).
This synchronization separation circuit (2) is further coupled to a vertical and horizontal separation circuit (3) that separates the vertical synchronization signal and horizontal synchronization signal, and a clear terminal (CLR) of the first counter (4). . A reference clock signal generation circuit (5) is coupled to the clock signal input terminal (CK) of the first counter (4), and a latch circuit (6) is coupled to the output terminal of the first counter (4). via the clear terminal (CLR) of the second counter (7). The vertical synchronization signal output terminal (V) of the vertical and horizontal separation circuit (3) is coupled to the clear terminal (CLR) of the latch circuit (6), and the horizontal synchronization signal output terminal (H) is connected to the second counter ( 7)
is coupled to the clock input terminal (GK) of. (8a
) (8b)... are output terminals of the second counter.

The operation of the circuit configuration as described above will be explained.

The video signal output circuit (1) outputs video signals as shown in FIGS. 3a and 3b. In this Figure 3 a and b, 1, 2, 3. . . 525 represents the horizontal scanning line number, and hereinafter, nH represents the n-th horizontal scanning line number. Also, among these IH~525H, IH~263.58 is an odd number field, 263°5H~525H is an even number field, and furthermore, in these IH~525H, ■H~9H and 26
The pulse width of the horizontal synchronizing signal in the equivalent pulse from 3H to 272H is 0.04H.The pulse width of the horizontal synchronizing signal in the normal period after 1IOH and after 273H is 0.08H. In addition,
(9) is a television video signal, (10) is a vertical synchronization signal, (
11) is a color burst signal, (12) is a character sampling line, and (T) is a vertical blanking period.

Here, in the sync separation circuit (2), from the video signal.

As shown in FIG. 2a, a composite synchronization signal (S Y N C) containing no video signal is formed. Therefore, the first
The counter (4) is cleared only during the period of the horizontal synchronization signal of the composite synchronization signal and counts the reference clock signal. And this first counter (4) is 0
．． It is set to be output only when the number exceeds 048. In other words, as shown in Fig. 2(d), there is no output for the horizontal synchronizing signal (0,048) in the equivalent pulse, but there is an output only for the horizontal synchronizing signal (0,08H) in one normal interval, and the latch circuit (6) Output to. This latch circuit (6) is connected to the second
It is cleared by the vertical synchronization signal (V) as shown in the figure.
It is set at the first 0.088 after this clearing, that is, at 0,08H at 108 in the odd field or 273H in the even field. Then, the second counter (7) is cleared by the output of the latch circuit (6), and the horizontal synchronization signal of the vertical/horizontal separation circuit (3) is sent to the clock terminal as a clock signal. Since it is counted, a pulse as shown in FIG. 2f is outputted to the output terminal (8a), and a pulse as shown in FIG. 2g is outputted to the output terminal (8b). In other words, the first 0.08H pulse after being cleared by the vertical synchronization signal is the IOH of the odd field.
Or it becomes 273H of an even field. therefore,
The periods after IOH and after 273H can be detected as being related to each other. The character multiplex signal superimposed on the character sampling line (12) during the vertical blanking period in this way is
Extracted accurately.

[Effects of the Invention] Since the present invention is configured as described above, by utilizing the fact that the pulse width of the horizontal synchronizing signal in one equivalent pulse is different from the pulse width of the horizontal synchronizing signal in the normal interval, Fields from 273H onward can be sequentially detected as mutually related positions, and therefore the burden of character signal discrimination by a microcomputer can be greatly reduced, and errors in transmitted content will not occur.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of a horizontal superimposition position detection circuit according to the present invention, FIG. 2 is an output waveform diagram of each part, and FIG. 3 is a waveform diagram of a video signal. (1)...Video signal output circuit, (2)...Sync separation circuit, (3)...Vertical and horizontal separation circuit, (4)...
・First counter. (5)...Reference clock signal generation circuit, (6)...
Latch circuit, (7)... second counter.

Claims (1)

[Claims] (1) A sync separation circuit for separating a composite sync signal obtained by removing the video signal from the video signal, and a vertical and horizontal sync circuit for further separating the composite sync signal of this sync separation circuit into a vertical sync signal and a horizontal sync signal. a separation circuit, a first counter that counts the reference clock signal only in the horizontal synchronization signal period and outputs an output when the counted number exceeds the horizontal synchronization signal period at the time of the equivalent pulse;
Detection of horizontal superimposition position in teletext broadcasting, characterized by comprising a latch circuit that is set by the output of a counter, and a second counter that is set by the output of the latch circuit and counts horizontal synchronization signals in a normal section. circuit.