JPH01155775A - Synchronizing signal extracting circuit - Google Patents

Abstract

PURPOSE:To extract an accurate synchronizing signal even when a composite synchronizing signal is missing by replacing the missed composite synchronizing signal with a synchronizing signal shaped by a counter when the composite synchronizing signal is missed. CONSTITUTION:A composite synchronizing signal inputted from a composite synchronizing signal input terminal 10 is outputted from a pulse shaping part 11 via a replacing circuit 18. An output signal from the part 11 is supplied to a preset input of the counter 15 via a gate circuit 13 to set a discrete value. The other of the above composite synchronizing signal is inputted to a vertical synchronizing signal detection part 12, from which a vertical synchronizing signal is outputted. In case composite synchronizing signals are missing as shown in 21, 22 and a synchronism missing signal is inputted to a missing signal input terminal, the replacing circuit 18 replaces the missing synchronizing signal part with synchronizing signal shaped by the counter 15. Thus composite synchronizing signals without any missing is inputted to the shaping part 11 and the detection part 12 so that an accurate synchronizing signal can be extracted.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synchronization signal extraction circuit that extracts a horizontal synchronization signal and a vertical synchronization signal from a composite synchronization signal separated from a reproduced video signal of, for example, a video disc.

2. Description of the Related Art A conventional synchronization signal extraction circuit will be described below with reference to the drawings.

FIG. 3 is a diagram showing the configuration of an example of a conventional synchronous signal extraction circuit, and FIG. 4 shows input and output signal waveforms of the conventional synchronous signal extraction circuit shown in FIG.

In Fig. 3, 30 is a composite synchronization signal input terminal, °31
32 is a pulse shaping section, 32 is a vertical synchronizing signal detecting section, 33 is a gate circuit, 35 is a counter, 37 is a vertical synchronizing signal output terminal, and 36 is a horizontal synchronizing signal output terminal.

In FIG. 4, fat in FIG. 4 is a composite synchronization signal including a missing portion, 41.42 is a missing portion of a decoded synchronization signal, and fat in FIG. 4 is an output signal of the pulse shaping section 31 shown in FIG.
(C1 is the horizontal synchronizing signal output from the horizontal synchronizing signal output terminal shown in FIG. 3, and 1dl in FIG. 4 is the vertical synchronizing signal output from the vertical synchronizing signal output terminal shown in FIG. 3, FIG. 37.

The operation will be explained below with reference to FIGS. 3 and 4.

In FIG. 3, one of the composite synchronization signals shown in FIG.

The pulse shaping section 31 converts the composite direction yI signal into a signal as shown in FIG. 4(b).
The vertical synchronization signal detection section 32 outputs a waveform shown in FIG. 4 (dl).

The signal shown in FIG. 4 (dl) is outputted to the vertical synchronization signal output terminal 37 as a vertical synchronization signal.

Further, the output signal of the pulse shaping section 31 is inputted to the preset input of the counter 35 through the gate circuit 33, and a count value is set in the counter 35. The counter 35 counts clocks with a frequency that is a multiple of the frequency of the horizontal synchronization signal, gates the gate circuit for a period longer than at least 1/2 of the period of the horizontal synchronization signal, and prevents the signal input to the counter 35 during that period. In this way, a horizontal synchronizing signal is outputted to the horizontal synchronizing signal output terminal 36 in the waveform shown in FIG. 4(e).

Problems to be Solved by the Invention In the synchronization signal extraction circuit of the conventional configuration, when the composite synchronization signal is missing as shown in Fig. 4 (C).
1. As shown in (dl), there were problems in that the horizontal synchronizing signal output was missing and the vertical synchronizing signal was erroneously detected.

Means for Solving the Problem In order to solve the above problem, the synchronization signal extraction circuit of the present invention extracts composite synchronization No. 13 using a synchronization signal shaped by a counter when information in which a composite synchronization signal is missing is obtained. This is the addition of a replacement circuit.

Effect of the Invention With the above-described configuration, the present invention makes it possible to accurately extract the synchronization signal even if the composite synchronization signal is lost by replacing it with the synchronization signal No. 13 shaped by the counter.

Embodiment Hereinafter, an embodiment of the synchronization (epsilon component extraction circuit) of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an example of the configuration of a synchronization signal extraction circuit of the present invention, and FIG. 2 is a diagram showing the operation of the synchronization signal extraction circuit of the present invention shown in FIG. 1.

In FIG. 1, lO is a composite synchronization signal input terminal, 11 is a pulse shaping section that performs differential processing of the intercomposite U signal, 12 is a vertical synchronization signal detection section, 13 is a gate circuit, and 15 is a multiple of the frequency of the horizontal synchronization signal. A counter that counts clocks with a certain frequency, 16 is a horizontal synchronizing signal output terminal, 17 is a vertical synchronizing signal output terminal, 18 is a composite synchronizing signal and the same M13 formatted by the counter is replaced with the synchronization signal formatted by the counter 15. A functional replacement circuit 19 is a missing signal input terminal that inputs information about which the composite synchronization signal is missing.

In FIG. 2, FIG. 2 1cI is a composite synchronization signal, 21.
22 is the missing part of the composite direction jUI signal, and the part (in Fig. 2) is the first
The output of the replacement circuit shown in FIG. 18, FIG. 2 1cI is as shown in FIG.
The output waveform of the pulse shaping section shown in Fig. 1 is shown in Fig. 2 (dl is the first
Output of the horizontal synchronization signal output terminal shown in Fig. 16, Fig. 2 1c
I is the output waveform of the vertical M signal output terminal shown in FIG. 17.

The operation will be explained below.

In FIG. 2, the composite synchronization signal input from the composite synchronization signal input terminal 10 in FIG.
The pulse shaping section 11 outputs the waveform shown in FIG. 2cI.

The output signal of the pulse shaping section 11 passes through the gate circuit 13 and is supplied to the preset input of the counter 15, and a count value is set in the counter. The counter 15 counts clocks with a frequency that is a multiple of the frequency of the horizontal synchronization signal, and by applying a gate to the gate circuit for at least the horizontal synchronization (1/2 period of No. 3), the counter 15
The signal input to the counter 15 is prohibited, and the signal is always input to the counter 15 at every l horizontal synchronization signal period. In this way, a horizontal synchronizing signal as shown in FIG. 2 (C1) can be obtained at the horizontal synchronizing signal output terminal 1G.

The other of the composite synchronization signals input manually from the composite synchronization signal input terminal 10 is input to the vertical synchronization signal detection section 12, and a vertical synchronization signal is outputted in the waveform shown in FIG. 2 (dl).

Furthermore, when the composite synchronization signal in FIG. 2 (5) is missing as shown at 21.22 and the synchronization missing signal is input to the missing signal input terminal, the replacement circuit 18 converts the missing synchronization signal portion into a counter. 15, and the pulse shaping section 11. A composite synchronization signal with no omissions is input to the vertical synchronization signal detection section 12, and accurate synchronization signal extraction can be performed.

Effects of the Invention As described above, the present invention provides the following advantages:
By replacing the missing composite sync signal with a sync signal shaped by a counter, it is possible to accurately extract the sync signal even if the composite sync signal is missing, and its practical effects are great.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a synchronization signal extraction circuit of the present invention, FIG. 2 is a waveform diagram showing signal waveforms of each part of the synchronization signal extraction circuit of the present invention, and FIG. 3 is a configuration diagram of a conventional synchronization signal extraction circuit. FIG. 4 is a waveform diagram showing signal waveforms of each part of the conventional synchronization signal extraction circuit. 10... Composite synchronous signal type power terminal, 11...
... Pulse shaping section, 12 ... Vertical synchronization signal detection section, 13 ... Gate circuit, 15 ... Counter, 16 ... Horizontal synchronization signal output terminal , 17
...Vertical synchronization signal output terminal, 18...
Replacement circuit, 19... Missing signal input terminal, 30.
......Composite synchronization signal input terminal, 31...Pulse shaping section, 32...Vertical synchronization signal detection section, 3
3...Gate circuit, 36...Horizontal synchronization signal output terminal, 37...Vertical synchronization signal output terminal. Name of agent: Patent attorney Toshio Nakao (1 person)
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Claims (1)

[Claims] In a synchronization signal extraction circuit comprising a counter having a count value corresponding to a period of a horizontal synchronization signal, a differentiation circuit for extracting a horizontal synchronization signal, and an integration circuit for extracting a vertical synchronization signal, information about the missing synchronization signal is obtained. A synchronous signal extraction circuit characterized in that a replacement circuit is added for replacing a missing synchronous signal with a synchronous signal shaped by a counter.