JPH01155776A - Synchronizing signal extracting circuit - Google Patents

Abstract

PURPOSE:To obtain a vertical synchronizing signal synchronized with a horizontal synchronizing signal and free from phase variation by latching a vertical synchronizing signal detected by a vertical synchronizing signal detection part by means of a signal synchronized with a horizontal synchronizing signal or a vertical equivalent pulse. CONSTITUTION:A composite synchronizing signal shown in figure (a) inputted from a composite synchronizing signal input terminal 10 is subjected to differentiation processing by a pulse shaping part 11. Thus pulse-shaped signal is supplied to the preset input of a counter 15 to set a discrete value. The other of the above composite synchronizing signal is inputted to a vertical synchronizing signal detection part 12 and subjected to integration processing therein, and a vertical synchronizing signal in a waveform shown by the figure (d) is extracted and inputted to a latch part 14. By using a signal shown by the figure (b) outputted from a pulse shaping part 11 for a latch signal supplied to the latch part 14, it is made possible that, at a vertical synchronizing signal output terminal, a horizontal synchronizing signal or a vertical synchronizing signal shown by the figure (e) synchronized with a vertical equivalent pulse is outputted without any phase shifting without fail.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a synchronization signal extraction circuit that extracts a horizontal synchronization signal and a vertical synchronization signal from a composite synchronization signal separated from a reproduced video signal of, for example, a video disc.

2. Description of the Related Art A conventional synchronization signal extraction circuit will be described below with reference to the drawings.

FIG. 3 is a diagram showing the configuration of an example of a conventional synchronizing signal extracting circuit, and FIG. 4 shows input and output signal waveforms of the conventional synchronizing signal extracting circuit shown in FIG.

In FIG. 3, 30 is a composite synchronizing signal input terminal, 31 is a differentiating circuit, 32 is an integrating circuit, 33, 36 is a Schmischt circuit, 34 is a horizontal synchronizing signal output terminal, and 35 is a vertical synchronizing signal output terminal.

In Fig. 4, Fig. 4 (18) is the composite synchronization signal, Fig. 4 (bl is the horizontal open! I11 signal, Fig. 4 (C1 is the vertical interval f
111 signal, Fig. 4 fdl is the output signal of the integrating circuit, the 4th
Figure tel is the output signal of the differentiating circuit.

The operation of the conventional synchronization signal extraction circuit will be explained below with reference to FIGS. 3 and 4.

The composite synchronization signal shown in ta+ in FIG. 4, which is input from the composite synchronization signal input terminal 30 in FIG. The differentiating circuit 31 extracts the changing portion of the composite synchronization signal with the waveform shown in FIG. is extracted.

The output waveforms of the differentiating circuit 31 and the integrating circuit 32 are shaped by Schmitt circuits 33 and 36, respectively, and a horizontal synchronizing signal is outputted to the horizontal synchronizing signal output terminal 34 in the waveform shown in FIG. A signal is output to the vertical synchronization signal output terminal 35 in the waveform shown in FIG. 4 (C1).

Problems to be Solved by the Invention In the conventional configuration of the synchronization signal extraction circuit, when detecting the vertical synchronization signal, the detection accuracy is determined by the capabilities of the integrating circuit and the Schmitt circuit, and phase fluctuations occur due to changes in ambient temperature, etc. Furthermore, there is a problem that the extracted vertical synchronization signal and horizontal synchronization signal are not synchronized.

Means for Solving the Problems In order to solve the above problems, the synchronization signal extraction circuit of the present invention has a configuration in which the extracted vertical synchronization signal is latched by the horizontal synchronization signal or the vertical equivalent pulse that is also extracted. This is what I did.

Effect The present invention has the above-described configuration, and the extracted vertical synchronization signal is
By latching with the extracted horizontal synchronizing signal or vertical equivalent pulse, phase fluctuations in the vertical synchronizing signal can be prevented, and a vertical synchronizing signal that is always synchronized with the horizontal synchronizing signal can be obtained.

Embodiment Hereinafter, one embodiment of the synchronization signal extraction circuit of the present invention will be described with reference to the drawings.

FIG. 1 is a diagram showing an example of the configuration of a synchronizing signal extracting circuit according to the present invention, and FIG. 2 is a diagram showing the operation of the synchronizing signal extracting circuit according to the present invention.

In FIG. 1, 10 is a composite synchronization signal input terminal, 11 is a pulse shaping section that performs differential processing on the composite synchronization signal, 12 is a vertical synchronization signal detection section, 13 is a gate circuit, 14 is a latch section,
15 is a counter that counts a clock having a frequency that is a multiple of the frequency of the horizontal synchronizing signal; 16 is a horizontal synchronizing signal output terminal; and 17 is a vertical synchronizing signal output terminal.

In FIG. 2, 18+ in FIG. 2 is a composite sync signal, bl is a differential waveform of the composite sync signal extracted by the pulse shaping section shown in FIG. 11, and 18+ in FIG. , FIG. 2 18+ is the vertical synchronization signal extracted by the vertical synchronization signal detection section shown in FIG.
el is the output waveform of the vertical synchronization signal.

The composite synchronization signal shown in FIG. 2 (δ) input from the composite synchronization signal input terminal 10 in FIG.
The waveform is differentiated by Tb) in FIG. 2. The signal pulse-shaped by the pulse shaping section 11 passes through the gate circuit 13 and is supplied to the precent input of the counter 15, and a count value is set in the counter. The counter 15 counts clocks with a frequency that is a multiple of the frequency of the horizontal synchronization signal, and gates the gate circuit for a period longer than at least 1/2 period of the horizontal synchronization signal, so that no signal is input to the counter 15 during that period. is prohibited, and a pulse signal is always input to the counter 15 in one horizontal opening signal period. In this way, a horizontal synchronizing signal as shown in FIG. 2(C) can be obtained at the horizontal synchronizing signal output terminal 16.

Figure 2 18+ input from composite synchronization signal input terminal lO
The other of the composite synchronization signals shown in FIG. At this time, by using the latch signal given to the latch section 14 as the signal shown in FIG. signal or a vertical synchronization signal shown in FIG. 2 18+ synchronized with the vertical equivalent pulse is output.

Effects of the Invention As described above, the present invention synchronizes with the horizontal synchronization signal by latching the vertical synchronization signal detected by the vertical synchronization signal detection section with the horizontal synchronization signal or a signal synchronized with the vertical equivalent pulse, Moreover, it is possible to obtain a vertical synchronization signal without phase fluctuation, and its practical effects are great.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a synchronization signal extraction circuit of the present invention, FIG. 2 is a waveform diagram showing signal waveforms of each part of the synchronization signal extraction circuit of the present invention, and FIG. 3 is a configuration of a conventional synchronization signal extraction circuit. FIG. 4 is a waveform diagram showing signal waveforms of each part of the conventional synchronization signal extraction circuit. lO...Composite synchronization signal input terminal, 11...
... Pulse shaping section, 12... Vehicle synchronization detection section,
13...Gate circuit, 14...Latch section, 15...Counter, 16...Horizontal synchronization signal output terminal, 17...Vertical Synchronization signal output terminal, 30...Composite synchronization signal input terminal, 31.
...Differential circuit, 32...Integrator circuit, 33
゜36... Schmitt circuit, 34...
Horizontal synchronization signal output terminal, 35...Vertical synchronization signal output terminal. Name of agent: Patent attorney Toshio Nakao Figure 3

Claims (1)

[Claims] A synchronization signal extraction circuit for extracting a horizontal synchronization signal and a vertical synchronization signal from a composite synchronization signal, comprising a differentiation circuit for extracting the horizontal synchronization signal of the composite synchronization signal, and an integration circuit for extracting the vertical synchronization signal, the integration circuit A synchronization signal extraction circuit characterized in that the vertical synchronization signal extracted by the differential circuit is latched by the signal extracted by the differentiation circuit.