JPS6165748U - - Google Patents
Info
- Publication number
- JPS6165748U JPS6165748U JP14967584U JP14967584U JPS6165748U JP S6165748 U JPS6165748 U JP S6165748U JP 14967584 U JP14967584 U JP 14967584U JP 14967584 U JP14967584 U JP 14967584U JP S6165748 U JPS6165748 U JP S6165748U
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- back surface
- circuit
- integrated circuit
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 239000002184 metal Substances 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 claims description 2
Landscapes
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Casings For Electric Apparatus (AREA)
Description
第１図は本考案の一実施例たる混成集積回路の
外観を示す斜視図、第２図は第１図に示す混成集
積回路の基板の裏面を示す平面図である。
１…金属容器、２…基板、３…レジスト（耐熱
膜）、８…半田代。
FIG. 1 is a perspective view showing the appearance of a hybrid integrated circuit according to an embodiment of the present invention, and FIG. 2 is a plan view showing the back side of the substrate of the hybrid integrated circuit shown in FIG. 1...Metal container, 2...Substrate, 3...Resist (heat-resistant film), 8...Solder cost.
Claims (1)
器内に収納すると共に、基板の裏面縁辺を金属容
器に半田付けして成る混成集積回路において、前
記基板の裏面に耐熱膜を枠状に形成することによ
り、前記基板の裏面縁辺に半田代を形成したこと
を特徴とする混成集積回路。 In a hybrid integrated circuit in which a circuit is formed on the surface of a substrate, this circuit is housed in a metal container, and the edge of the back surface of the substrate is soldered to the metal container, a heat-resistant film is formed in the shape of a frame on the back surface of the substrate. A hybrid integrated circuit characterized in that a solder margin is formed on the edge of the back surface of the substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14967584U JPH0249730Y2 (en) | 1984-10-02 | 1984-10-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14967584U JPH0249730Y2 (en) | 1984-10-02 | 1984-10-02 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6165748U true JPS6165748U (en) | 1986-05-06 |
| JPH0249730Y2 JPH0249730Y2 (en) | 1990-12-27 |
Family
ID=30707844
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14967584U Expired JPH0249730Y2 (en) | 1984-10-02 | 1984-10-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0249730Y2 (en) |
-
1984
- 1984-10-02 JP JP14967584U patent/JPH0249730Y2/ja not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0249730Y2 (en) | 1990-12-27 |