JPH01132068U - - Google Patents
Info
- Publication number
- JPH01132068U JPH01132068U JP2938488U JP2938488U JPH01132068U JP H01132068 U JPH01132068 U JP H01132068U JP 2938488 U JP2938488 U JP 2938488U JP 2938488 U JP2938488 U JP 2938488U JP H01132068 U JPH01132068 U JP H01132068U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- thick film
- circuit board
- side edge
- parallel part
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims 2
Landscapes
- Multi-Conductor Connections (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第１図は本考案の実施例を示す正面図、第２図
は同側面図、第３図は本考案の他の実施例を示す
正面図、第４図は同側面図、第５図は従来装置を
示す正面図、第６図は同側面図、第７図は同装置
の外部引出しリードの斜視図である。
１；厚膜集積回路基板、２；捺印部、３，４，
１１，１２，２１，２２；外部引出しリード、５
，１３，２３；段違い平行部、６，１４ａ，１４
ｂ，２４；上片、７，１５ａ，１５ｂ，２５；下
片。
Fig. 1 is a front view showing an embodiment of the present invention, Fig. 2 is a side view of the same, Fig. 3 is a front view showing another embodiment of the invention, Fig. 4 is a side view of the same, and Fig. 5 is a side view of the same. FIG. 6 is a front view of the conventional device, FIG. 6 is a side view of the same, and FIG. 7 is a perspective view of the external lead of the device. 1; Thick film integrated circuit board, 2; Stamping part, 3, 4,
11, 12, 21, 22; External drawer lead, 5
, 13, 23; uneven parallel part, 6, 14a, 14
b, 24; upper piece; 7, 15a, 15b, 25; lower piece.
Claims (1)
一対の対向両側縁部を該基板の上下面から挾み込
む段違い平行部を有しこの段違い平行部を介して
前記基板の両側縁部に所定の間隔で装着された複
数の外部取出しリードとを備えたデユアルインラ
イン形混成集積回路装置において、前記複数の外
部取出しリードの各段違い平行部は、前記厚膜集
積回路基板の一方の側縁部に配置されたものの形
状と、他方の側縁部に配置されたものの形状とが
、鏡面対称の関係になつていることを特徴とする
デユアルインライン形混成集積回路装置。 A thick film integrated circuit board, and a stepped parallel part that sandwiches a pair of opposite side edges of the thick film integrated circuit board from the upper and lower surfaces of the substrate, and a stepped parallel part that extends to both side edges of the substrate through the uneven parallel part. In a dual-in-line hybrid integrated circuit device comprising a plurality of external lead-out leads mounted at predetermined intervals, each of the plurality of external lead-out leads has an uneven parallel portion at one side edge of the thick film integrated circuit board. 1. A dual-in-line hybrid integrated circuit device, characterized in that the shape of the one placed on the side edge and the shape of the other side edge are mirror symmetrical.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2938488U JPH01132068U (en) | 1988-03-04 | 1988-03-04 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2938488U JPH01132068U (en) | 1988-03-04 | 1988-03-04 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01132068U true JPH01132068U (en) | 1989-09-07 |
Family
ID=31253550
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2938488U Pending JPH01132068U (en) | 1988-03-04 | 1988-03-04 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01132068U (en) |
-
1988
- 1988-03-04 JP JP2938488U patent/JPH01132068U/ja active Pending
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