JPS6160580B2 - - Google Patents
Info
- Publication number
- JPS6160580B2 JPS6160580B2 JP17039580A JP17039580A JPS6160580B2 JP S6160580 B2 JPS6160580 B2 JP S6160580B2 JP 17039580 A JP17039580 A JP 17039580A JP 17039580 A JP17039580 A JP 17039580A JP S6160580 B2 JPS6160580 B2 JP S6160580B2
- Authority
- JP
- Japan
- Prior art keywords
- polycrystalline silicon
- silicon layer
- electrode window
- insulating film
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17039580A JPS5793548A (en) | 1980-12-03 | 1980-12-03 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17039580A JPS5793548A (en) | 1980-12-03 | 1980-12-03 | Manufacture of semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5793548A JPS5793548A (en) | 1982-06-10 |
JPS6160580B2 true JPS6160580B2 (en, 2012) | 1986-12-22 |
Family
ID=15904125
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17039580A Granted JPS5793548A (en) | 1980-12-03 | 1980-12-03 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5793548A (en, 2012) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2566181B1 (fr) * | 1984-06-14 | 1986-08-22 | Commissariat Energie Atomique | Procede d'autopositionnement d'une ligne d'interconnexion sur un trou de contact electrique d'un circuit integre |
JPS62217636A (ja) * | 1986-03-19 | 1987-09-25 | Fujitsu Ltd | 半導体装置の製造方法 |
US5093275A (en) * | 1989-09-22 | 1992-03-03 | The Board Of Regents, The University Of Texas System | Method for forming hot-carrier suppressed sub-micron MISFET device |
US5234863A (en) * | 1990-12-11 | 1993-08-10 | Seiko Instruments Inc. | Method of manufacturing doped contacts to semiconductor devices |
-
1980
- 1980-12-03 JP JP17039580A patent/JPS5793548A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS5793548A (en) | 1982-06-10 |
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