JPS6157319A - Resin molding method of electronic parts - Google Patents

Resin molding method of electronic parts

Info

Publication number
JPS6157319A
JPS6157319A JP17414085A JP17414085A JPS6157319A JP S6157319 A JPS6157319 A JP S6157319A JP 17414085 A JP17414085 A JP 17414085A JP 17414085 A JP17414085 A JP 17414085A JP S6157319 A JPS6157319 A JP S6157319A
Authority
JP
Japan
Prior art keywords
cavity
lead frame
mold
lead
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17414085A
Other languages
Japanese (ja)
Inventor
Senji Shoji
庄司 仙治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP17414085A priority Critical patent/JPS6157319A/en
Publication of JPS6157319A publication Critical patent/JPS6157319A/en
Pending legal-status Critical Current

Links

Landscapes

  • Moulds For Moulding Plastics Or The Like (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PURPOSE:To prevent generation of burrs on a lead part, by so constituting a lead frame that the other cavity is provided on a position corresponding to a lead part of the outside of the lead frame and resin is poured within a cavity provided corresponding to a principal part. CONSTITUTION:A surface side and a back side of a lead frame 13 are provided respectively with a top force 11 and a bottom force 12 and the dimensions of a cavity 21 in a widthward and heightward directions are made smaller than those of cavities 14 positioned on both sides of the cavity 21. A tab part 20 of the lead frame 13 is provided with a semiconductor pellet and electric connection is applied to a space between an electrode provided on the semiconductor pellet and lead part of the outside by a wire. Contact bonding of the top force 11 and bottom force 12 is performed respectively from the surface side and th back side of the lead frame 13 under such condition, which is made to concentrate by pouring molding resin within the cavity 14 from a runner 16 and generation of burrs is prevented.

Description

【発明の詳細な説明】 [技術分野] 本発明は半導体素子等の電子部品の樹脂モールド方法に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a resin molding method for electronic components such as semiconductor elements.

[背景技術] 従来の半導体素子に対する樹脂モールド方法は第1図に
示すように、一方の型たとえば下型2を固定し、他方の
型たとえば上型1を図示しないプレスで持ち上げたのち
、リードフレーム3を図示しない下型ガイドピンに装填
し、上型1をおろして締めつける。これにより、第2図
に示すようにリードフレーム3の表裏両面はキャビティ
4.デート5.ランナ6を除いて上型1.下型2で締め
られ、この状態でモールドレジンをキャビティ4内に注
入するものであった。
[Background Art] As shown in FIG. 1, the conventional resin molding method for semiconductor devices involves fixing one mold, such as the lower mold 2, and lifting the other mold, such as the upper mold 1, with a press (not shown), and then molding the lead frame. 3 is loaded onto a lower mold guide pin (not shown), and the upper mold 1 is lowered and tightened. As a result, as shown in FIG. 2, both the front and back surfaces of the lead frame 3 form a cavity 4. Date 5. Upper mold 1 except for runner 6. It was tightened with the lower mold 2, and in this state, mold resin was injected into the cavity 4.

しかしながら、このような従来の半導体モールド方法に
おいては、上型1.下型2の接触(平行度)および締め
付は具合によっては、m2図に示すようにダム7の外側
すなわち外部リード部8にまで極めて薄いバリ9(通常
20um以下)を生じるこのパリ9は極めて薄いために
取りにくく、また薄いためにバリ9の有無の検出がむず
かしい。このため組立に際し、外部リード部に半田が付
かない難があった。
However, in such conventional semiconductor molding methods, the upper mold 1. Depending on the contact (parallelism) and tightening of the lower die 2, an extremely thin burr 9 (usually less than 20 um) may be formed on the outside of the dam 7, that is, on the external lead part 8, as shown in the figure m2. Because it is thin, it is difficult to remove it, and because it is thin, it is difficult to detect the presence or absence of the burr 9. Therefore, during assembly, there was a problem in that solder did not adhere to the external lead portion.

なお、この種のパリを取る一つの方法は特公昭51−9
777号公報によって知られている。
In addition, one way to take this kind of Paris
It is known from Publication No. 777.

[発明の目的] 本発明の目的とするところは外部リード部に薄いモール
ドバリが生じない新規なモール団方法を提供することに
ある。
[Object of the Invention] An object of the present invention is to provide a new mold grouping method that does not cause thin mold burrs on the external lead portion.

[発明の概要] このような目的を達成するための本発明の基本溝底は、
上型と下型との間にリードフレームの主要部に対応させ
てキャビティを設け、このキャビティ内にレジンを注入
してモールドする電子部品の樹脂モールド方法であって
、前記リードフレームのダム部を上型と下型でもって押
え、かつリードフレームの外部リード部に対応するとこ
ろに他のキャビティを設けるようにし、前記主要部に対
応させて設けられたキャビティ内にレジンを注入してな
ることを特徴とする電子部品の樹脂モールド方法であっ
て、以下、添付図面に関連して本発明の実施例について
説明する。
[Summary of the Invention] The basic groove bottom of the present invention to achieve such an object is as follows:
A resin molding method for electronic components, in which a cavity is provided between an upper mold and a lower mold corresponding to the main part of a lead frame, and resin is injected into the cavity to mold the electronic component, the dam part of the lead frame being molded. The lead frame is held down by an upper mold and a lower mold, and another cavity is provided at a location corresponding to the external lead part of the lead frame, and resin is injected into the cavity provided to correspond to the main part. DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention, which is a characteristic resin molding method for electronic components, will be described below with reference to the accompanying drawings.

[実施例] 第3図は本発明のモールド装置の平面図であって、リー
ドフレーム13のタブ20および内部リード部17を含
む主要部に対応するよう形成させたキャビティ14は、
ゲート15を介してランナ16に連絡され、このランナ
16を通してモールド・レジンを供給できる上うにして
いる。また、キャビティ14の隣1)にはリードフレー
ム13の外部リード部18に対応するようにキャビティ
21を形成している。この図から明らかなようにリード
フレーム13のダム部7は上型と下型とで押え付けられ
る。
[Example] FIG. 3 is a plan view of a molding device of the present invention, and the cavity 14 is formed to correspond to the main part of the lead frame 13 including the tab 20 and the internal lead part 17.
A runner 16 is connected through a gate 15 through which mold resin can be supplied. Further, a cavity 21 is formed next to the cavity 14 (1) so as to correspond to the external lead portion 18 of the lead frame 13. As is clear from this figure, the dam portion 7 of the lead frame 13 is pressed down by the upper mold and the lower mold.

第4図は第3図のA−A線に沿って矢印方向に見た縦断
面図であって、リードフレーム13の表面側にあるのが
上型11で、裏面側にあるのが下型12であって、キャ
ビティ21はその両側に位置するキャビティ14よりら
幅および高さ方向の寸法が小さくされているが、この部
分はスペースさえあればよいのであり中、高さ共キャビ
ティ14よりも大きくてもよい。そして上型11と下型
12に同寸法に空間が合わさって1つのキャビティ21
を構成している。なお、図示していないが、リードフレ
ーム13のタブ部20には半導体ペレットが取付けられ
、かつその半導体ペレットに設けられた電極と外部リー
ド部との開はワイヤにより電気的接続がなされている。
FIG. 4 is a longitudinal cross-sectional view taken along the line A-A in FIG. 12, the width and height dimensions of the cavity 21 are smaller than those of the cavities 14 located on both sides of the cavity 21, but since this part only needs space, both the inside and height are smaller than the cavities 14. It can be large. Then, the upper mold 11 and the lower mold 12 have spaces of the same size, forming one cavity 21.
It consists of Although not shown, a semiconductor pellet is attached to the tab portion 20 of the lead frame 13, and an electrical connection is made between the electrode provided on the semiconductor pellet and the external lead portion by a wire.

このような状態でリードフレーム13の表面側から上型
11を裏面側から下型12を圧着してランナ16がらゲ
ート15を介してキャビティ14内にモールド・レシン
を注入すればこのレジンはキャビティ14の空隙をうめ
る。
In this state, if the upper mold 11 is pressed from the front side of the lead frame 13 and the lower mold 12 is pressed from the back side, and mold resin is injected into the cavity 14 through the gate 15 through the runner 16, this resin will be poured into the cavity 14. fill the void.

特に、第3図、f54図に示すようにダム間に一つのキ
ャビティ21を設けた場合、ダム間に二つのキャビティ
(断面的に二つのキャビティが存在)を設けた場合に比
べて、上型、下型の締付力はダム部に集中し、パリ発生
をよ1)防止する効果がある。
In particular, when one cavity 21 is provided between the dams as shown in Fig. 3 and f54, the upper mold The clamping force of the lower die is concentrated on the dam part, which has the effect of preventing the occurrence of flashing.

そして、たとえ上型と下型との皿のわずがな開4を通り
でも、キャビティ21内にまでもれ、第5図に示すよう
にキャビティ21内において機械的に除去しやすい厚め
のモールドバリ27が形成される。そこで、第5図のよ
うに形成されたモールにバリ27はff55図における
B−B断面を示す!@6図(a)の状態すなわち、外部
リード部18が7ラツトの状態から、同図(b)の状態
、折曲型(下型)31および折曲型(上型)32で強制
的に曲げられる際に、両折的型31.32によるストレ
スで、また図示しないダムの切断時に加わる機械的衝撃
で大部分は自動的に除去される。
Even if it passes through the opening 4 in the plates between the upper mold and the lower mold, it will leak into the cavity 21, and as shown in FIG. A burr 27 is formed. Therefore, the burr 27 on the molding formed as shown in Fig. 5 shows the BB cross section in Fig. ff55! @6 From the state shown in Figure (a), that is, the state in which the external lead portion 18 is at 7 rats, to the state shown in Figure (b), the bending die (lower die) 31 and the bending die (upper die) 32 are forcibly removed. During bending, most of it is automatically removed by the stress caused by the bifold molds 31, 32 and by the mechanical impact applied when cutting the dam (not shown).

[効果1 以上の説明から明らかなように本発明によれば、半導体
素子(リードフレーム他)の外部リード部に対応させて
上型、下型に共通のキャビティを設け、従来、外部リー
ド部に加わっていた上型、下型の締付力をダム部に集中
させるため、それだけ外部リード部へのパリが発生しに
くくなる。したがって外部リード部に対して良好な半田
付けが可能となる。
[Effect 1] As is clear from the above explanation, according to the present invention, a common cavity is provided in the upper mold and the lower mold in correspondence with the external lead part of a semiconductor element (lead frame, etc.) Since the clamping force applied by the upper and lower dies is concentrated on the dam part, it becomes less likely that the external lead part will be damaged. Therefore, good soldering to the external lead portion is possible.

[利用分野] 本願発明は半導体素子のみならず一般電子部品をレジン
モールドする場合にも適用できる。
[Field of Application] The present invention can be applied not only to semiconductor devices but also to resin molding of general electronic components.

【図面の簡単な説明】[Brief explanation of drawings]

第1図および第2図は従来の半導体モールド装置の説明
図、第3図および第4図は本発明の半導体モールド装置
の説明図、第5図は外部リード部に厚いモールドパリを
形成した場合の平面図、第6図(a)、 (b)はモー
ルドバリの除去前後の状態を示す説明図である。 1・・・上型、2・・・下型、3・・・リードフレーム
、4・・・キャビティ、5・・・デート、6・・・ラン
ナ、7・・・ダム、訃・・外部リード部、9・・・薄い
パリ、11・・・上型、12・・・下型、13・・・リ
ードフレーム、14・・・キャビティ、15・・・デー
ト、16・・・ライナ、17・・・内部リード部、18
・・・外部リード部、20・・・タブ、21・・・キャ
ビティ、25・・・デート、27・・・モールドバリ、
28・・・ダム外側面、29・・・モールド主要部、3
0・・・暮手のパリ、31・・・折曲型(下型)、第4
図 第5図     第6図 〒−C’J 恭               賊 嗜 \ら         \
1 and 2 are explanatory diagrams of a conventional semiconductor molding device, FIGS. 3 and 4 are explanatory diagrams of a semiconductor molding device of the present invention, and FIG. 5 is a case in which a thick mold pad is formed on the external lead portion. 6(a) and 6(b) are explanatory diagrams showing the state before and after removal of mold burrs. 1... Upper die, 2... Lower die, 3... Lead frame, 4... Cavity, 5... Date, 6... Runner, 7... Dam, butt... External lead Part, 9... Thin Paris, 11... Upper die, 12... Lower die, 13... Lead frame, 14... Cavity, 15... Date, 16... Liner, 17...・Internal lead part, 18
...External lead part, 20...Tab, 21...Cavity, 25...Date, 27...Mold burr,
28...Dam outer surface, 29...Mold main part, 3
0...Paris in Kurete, 31...Folding type (lower type), 4th
Figure 5 Figure 6 - C'J

Claims (1)

【特許請求の範囲】[Claims] 上型と下型との間にリードフレームの主要部に対応させ
てキャビティを設け、このキャビティ内にレジンを注入
してモールドする電子部品の樹脂モールド方法であって
、前記リードフレームのダム部を上型と下型でもって押
え、かつリードフレームの外部リード部に対応するとこ
ろに他のキャビティを設けるようにし、前記主要部に対
応させて設けられたキャビティ内にレジンを注入してな
ることを特徴とする電子部品の樹脂モールド方法。
A resin molding method for electronic components, in which a cavity is provided between an upper mold and a lower mold corresponding to the main part of a lead frame, and resin is injected into the cavity to mold the electronic component, the dam part of the lead frame being molded. The lead frame is held down by an upper mold and a lower mold, and another cavity is provided at a location corresponding to the external lead part of the lead frame, and resin is injected into the cavity provided to correspond to the main part. Characteristic resin molding method for electronic components.
JP17414085A 1985-08-09 1985-08-09 Resin molding method of electronic parts Pending JPS6157319A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17414085A JPS6157319A (en) 1985-08-09 1985-08-09 Resin molding method of electronic parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17414085A JPS6157319A (en) 1985-08-09 1985-08-09 Resin molding method of electronic parts

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP10059976A Division JPS5942455B2 (en) 1976-08-25 1976-08-25 Resin molding equipment for electronic parts

Publications (1)

Publication Number Publication Date
JPS6157319A true JPS6157319A (en) 1986-03-24

Family

ID=15973362

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17414085A Pending JPS6157319A (en) 1985-08-09 1985-08-09 Resin molding method of electronic parts

Country Status (1)

Country Link
JP (1) JPS6157319A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0371438A (en) * 1989-08-11 1991-03-27 Sanyo Electric Co Ltd Tilt servo device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519777A (en) * 1974-07-09 1976-01-26 Shoichi Takagi ONPANYORU BISEIBUTSUNO HATSUKO SOKUSHINHO
JPS5114270A (en) * 1974-07-27 1976-02-04 Nitto Electric Ind Co Denshikairobuhinno fushihoho
JPS5147369A (en) * 1974-10-21 1976-04-22 Hitachi Ltd Jushifushi nyoru handotaisochino seizoho

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS519777A (en) * 1974-07-09 1976-01-26 Shoichi Takagi ONPANYORU BISEIBUTSUNO HATSUKO SOKUSHINHO
JPS5114270A (en) * 1974-07-27 1976-02-04 Nitto Electric Ind Co Denshikairobuhinno fushihoho
JPS5147369A (en) * 1974-10-21 1976-04-22 Hitachi Ltd Jushifushi nyoru handotaisochino seizoho

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0371438A (en) * 1989-08-11 1991-03-27 Sanyo Electric Co Ltd Tilt servo device

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