JP2589184B2 - Method for manufacturing semiconductor device - Google Patents

Method for manufacturing semiconductor device

Info

Publication number
JP2589184B2
JP2589184B2 JP1208146A JP20814689A JP2589184B2 JP 2589184 B2 JP2589184 B2 JP 2589184B2 JP 1208146 A JP1208146 A JP 1208146A JP 20814689 A JP20814689 A JP 20814689A JP 2589184 B2 JP2589184 B2 JP 2589184B2
Authority
JP
Japan
Prior art keywords
resin
lead frame
punching
burrs
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1208146A
Other languages
Japanese (ja)
Other versions
JPH0371647A (en
Inventor
公 落合
賢一 都丸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Denki Co Ltd
Original Assignee
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Application filed by Sanyo Denki Co Ltd filed Critical Sanyo Denki Co Ltd
Priority to JP1208146A priority Critical patent/JP2589184B2/en
Publication of JPH0371647A publication Critical patent/JPH0371647A/en
Application granted granted Critical
Publication of JP2589184B2 publication Critical patent/JP2589184B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch

Abstract

PURPOSE:To reduce a resistance at the time of injection of a resin, to make a lead frame fix excellently with the resin even if the thickness of the resin in thin and to make it possible to remove completely resin burrs by a method wherein the resin burrs are removed by inserting punches from the direction reverse to the punching direction of leads. CONSTITUTION:Resin burrs 29 are removed by inserting punches 30 from the direction reverse to the punching direction of leads 24 and moreover, the punching surface of a lead frame is face downward and a resin flows in from the direction of the punching surface. Accordingly, even if a resin injection gate is located in a bottom face, the resin can flow in without resistance as shown by arrows and when the leads are punched by the punches 30 from the surface, on which punching burrs 28 are generated, of the lead frame, the resin burrs 29 can be removed excellently using these punches 30 because the burrs 29 are adhered only on the longitudinal side surfaces of the leads 24. Thereby, the fluidity of the resin is improved, the resin can be firmly bonded on the lead parts and the resin burrs can be completely removed.

Description

【発明の詳細な説明】 （イ）産業上の利用分野 本発明は半導体装置の製造方法に関するものである。The present invention relates to a method of manufacturing a semiconductor device.

（ロ）従来の技術 一般に、リードフレームに半導体素子を固着し樹脂モ
ールドする技術は、例えば特公昭55−24694号公報が詳
しい。(B) Conventional technology Generally, for example, Japanese Patent Publication No. 55-24694 discloses a detailed technique for fixing a semiconductor element to a lead frame and performing resin molding.

これは、リードフレームの打抜き面を下部金型と対面
させ、フレームの反りを防止するものである。This is to prevent the punching surface of the lead frame from facing the lower mold and prevent the frame from warping.

しかし現在は、打抜き技術が進歩し打抜き面の角部の
丸みを極力抑えることが可能となり、打抜き面とこの打
抜き面と対向する面とが実質的に同じ面積となってい
る。しかも対向する面の周辺に生じる抜きバリを平坦に
できない理由と相俟って、第４図の如く、打抜き面を上
にして半導体装置（１）を製造している。However, at present, the punching technology has advanced and it is possible to minimize the roundness of the corners of the punched surface, and the punched surface and the surface facing the punched surface have substantially the same area. In addition, the semiconductor device (1) is manufactured with the punched surface up as shown in FIG. 4, in combination with the reason that the punched burrs generated around the opposed surface cannot be made flat.

第４図を参照しながら半導体装置（１）の構成を説明
すると、先ずリードフレーム（２）があり、このリード
フレーム（２）の打抜き面は上にしてある。図からも判
る通り、打抜き面の角部（３）は丸みを生じ、この打抜
き面と反対の面の周辺には抜きバリ（４）が形成されて
いる。（５）はダフであり、（６）はリード、（７）は
金属細線である。Referring to FIG. 4, the structure of the semiconductor device (1) will be described. First, there is a lead frame (2), and the punched surface of the lead frame (2) is set to the upper side. As can be seen from the figure, a corner (3) of the punched surface is rounded, and a punch burr (4) is formed around the surface opposite to the punched surface. (5) is a duff, (6) is a lead, and (7) is a thin metal wire.

（ハ）発明が解決しようとする課題 前述の半導体装置（１）を樹脂モールドする時の概略
図を第５図に示す。現在は益々リード（６）の数が増
え、リード（６）下面のトータル面積が増大しているの
で、矢印の如く樹脂注入口が下金型にあると、抜きバリ
（４）が流入抵抗となって樹脂の流動性を低下させてい
た。(C) Problems to be Solved by the Invention FIG. 5 is a schematic diagram when the semiconductor device (1) is resin-molded. At present, the number of leads (6) is increasing more and the total area of the lower surface of the leads (6) is increasing. Therefore, if the resin injection port is in the lower mold as shown by the arrow, the burrs (4) reduce the inflow resistance. As a result, the fluidity of the resin was reduced.

またタイバー部の樹脂バリ（８）を、タイバーカット
時に第６図の如くパンチ（９で除去するが、樹脂がリー
ド部（６）の抜きダレ部（角部の丸み）に強固に接着し
ているため、このタイバーカット工程で完全に除去でき
ず、第６図で示した黒い部分（10）が残ってしまう問題
を有していた。そのためウォータジェット等で樹脂バリ
を完全に取り除く工程が必要となっていた。The resin burrs (8) at the tie bar portion are removed by a punch (9) as shown in FIG. 6 at the time of cutting the tie bar. Therefore, there was a problem that the black portion (10) shown in Fig. 6 remained because the tie-bar cutting process could not completely remove the resin burrs. Had become.

（ニ）課題を解決するための手段 本発明は前述の課題に鑑みて成され、前記樹脂バリ
（29）をリード（24）の打抜き方向と逆の方向からパン
チ（30）を挿入して除去し、更にはリードフレームの打
抜き面を下にして、打抜き面の方より樹脂を流入するこ
とで解決するものである。(D) Means for Solving the Problems The present invention has been made in view of the aforementioned problems, and removes the resin burr (29) by inserting a punch (30) from a direction opposite to a punching direction of a lead (24). Further, the problem is solved by making the punched surface of the lead frame face down and injecting the resin from the punched surface.

（ホ）作用 第２図の如く、打抜き面を下にして形成してあるの
で、前記抜きダレ部（27）が下に形成される。従って樹
脂注入口が下金型にあっても、第３図の矢印の如く抵抗
なく流入させることができる。(E) Operation As shown in FIG. 2, since the punching surface is formed with the punching surface facing down, the punching sag portion (27) is formed below. Therefore, even if the resin injection port is in the lower mold, it can be introduced without resistance as indicated by the arrow in FIG.

また第１図の如く、抜きバリ（28）の生じている面か
らパンチ（30）で打抜く際、樹脂バリ（29）はリード
（24）の縦側面のみにしか付着していないので、このパ
ンチを使って良好に樹脂バリ（29）を除去できる。Also, as shown in FIG. 1, when the punch (30) is used to punch out the surface on which the burrs (28) are formed, the resin burrs (29) adhere only to the vertical side surfaces of the leads (24). The resin burr (29) can be removed well using a punch.

（ヘ）実施例 以下に本発明の実施例を詳述する。(F) Examples Examples of the present invention will be described in detail below.

先ず説明の都合上第２図に示した半導体装置（21）の
構成について述べてゆく。First, the configuration of the semiconductor device (21) shown in FIG. 2 will be described for convenience of explanation.

半導体素子（22）がリードフレームの一部であるタブ
（23）に固着されており、半導体素子（22）とリードフ
レームの一部である複数本のリード（24）との間を金属
細線（25）で電気的に接続されている。更には半導体素
子（22）、タブ（23）、金属細線（25）およびリード
（24）の一部が樹脂（26）によってモールドされてお
り、このリード（24）は下方に所定形状に折り曲げられ
ている。A semiconductor element (22) is fixed to a tab (23) which is a part of a lead frame, and a thin metal wire () is provided between the semiconductor element (22) and a plurality of leads (24) which are a part of the lead frame. 25) is electrically connected. Further, a part of the semiconductor element (22), the tab (23), the fine metal wire (25), and the lead (24) are molded with the resin (26), and the lead (24) is bent downward into a predetermined shape. ing.

次にこの半導体装置（21）の製造方法について説明し
てゆく。Next, a method of manufacturing the semiconductor device (21) will be described.

先ずリードフレームを打抜き形成するために、例えば
銅を主成分とした金属基板が用意される。この金属基板
はプレスによって一連のリードフレームが形成される。
従って図にも示されるように、下面に抜きダレ部（27）
が生じ、上面には抜きバリ（28）が生じる。またリード
（24）の一端は金属細線（25）の接合領域として平坦化
されている。First, in order to form a lead frame by punching, for example, a metal substrate mainly containing copper is prepared. A series of lead frames are formed on the metal substrate by pressing.
Therefore, as shown in FIG.
And a burr (28) is formed on the upper surface. One end of the lead (24) is flattened as a bonding region of the thin metal wire (25).

次にこのリードフレームの一部であるタブ（23）に半
導体素子（22）が固着され、金属細線（25）にて前記リ
ード（24）の接合領域とこの半導体素子（22）のボンデ
ィングパッド部が電気的に接合される。Next, a semiconductor element (22) is fixed to a tab (23) which is a part of the lead frame, and a bonding area of the lead (24) and a bonding pad portion of the semiconductor element (22) are fixed by a thin metal wire (25). Are electrically connected.

続いて第３図の如く金型にこのリードフレームを組込
み、図の如く樹脂を注入する。リードフレームの下面は
前述した如く抜きダレ（27）が生じ丸みが生じているた
め、矢印の如くスムーズに流れる。その結果、第５図の
樹脂の流動性とは異なり大幅に改善される。従って樹脂
厚2mm前後の薄いものでも、リードフレームは上下せず
良好な位置に固定できる。Subsequently, the lead frame is assembled into a mold as shown in FIG. 3, and a resin is injected as shown in FIG. As described above, the lower surface of the lead frame flows smoothly as indicated by the arrow because the cutout (27) occurs and the roundness occurs. As a result, the fluidity is greatly improved, unlike the fluidity of the resin shown in FIG. Therefore, even with a thin resin having a thickness of about 2 mm, the lead frame can be fixed at a favorable position without moving up and down.

更に第１図の如く、リード（24）間に固着された樹脂
バリ（29）を取り除く工程がある。この時は同時にタイ
バーカットも実施される。点でハッチングした領域が樹
脂バリ（29）であり、図からも判る通り、リードの側面
にしか付いていない領域を先にパンチ（30）で押してゆ
くので、固着力の強い抜きダレ部（27）の樹脂バリは樹
脂バリ（29）と一体となって除去されてゆく。従って樹
脂バリを完全に取除くことができる。Further, as shown in FIG. 1, there is a step of removing the resin burr (29) fixed between the leads (24). At this time, tie bar cutting is also performed at the same time. The area hatched at the dots is the resin burr (29), and as can be seen from the figure, the area that is only attached to the side of the lead is pushed first with the punch (30). The resin burr () is removed together with the resin burr (29). Therefore, resin burrs can be completely removed.

最後に第２図で示したように、リード（24）を折り曲
げる工程がある。樹脂バリ（29）が完全に除去できるの
で、折り曲げ治具（31）と樹脂（26）の間に樹脂バリ
（29）が入り込まず良好な寸法で折り曲げられる。Finally, as shown in FIG. 2, there is a step of bending the lead (24). Since the resin burrs (29) can be completely removed, the resin burrs (29) do not enter between the bending jig (31) and the resin (26) and can be bent with good dimensions.

（ト）発明の効果 以上の説明からも明らかな如く、抜きダレを下面にす
るため樹脂の流動性が向上し、リードフレームに与える
樹脂注入時の抵抗を低下させることができる。従って樹
脂厚の薄いものでも良好にリードフレームを固定でき、
不良を防止できる。(G) Advantages of the Invention As is clear from the above description, the flowability of the resin is improved because the cutting sag is on the lower surface, and the resistance of the lead frame at the time of resin injection can be reduced. Therefore, the lead frame can be fixed well even with a thin resin,
Failure can be prevented.

またリード間に発生する樹脂バリは、打抜き面とは反
対の面から打抜き除去されるので、完全に除去できる。
従って折り曲げ寸法を精度良く加工できる。しかも別に
ウォータージェット等で樹脂バリを除去する工程が省
け、工程を短かくすることができる。In addition, resin burrs generated between the leads are punched and removed from the surface opposite to the punched surface, and thus can be completely removed.
Therefore, the bending dimension can be processed with high accuracy. In addition, the step of removing resin burrs with a water jet or the like can be omitted, and the step can be shortened.

【図面の簡単な説明】[Brief description of the drawings]

第１図は本発明の樹脂バリ除去の工程を説明する断面
図、第２図は本発明で達成できる半導体装置の断面図、
第３図は本発明の樹脂モールド工程を説明する断面図、
第４図は従来の半導体装置の断面図、第５図は従来の樹
脂モールド工程を説明する断面図、第６図は従来の樹脂
バリ除去の工程を説明する図である。FIG. 1 is a cross-sectional view illustrating a process of removing resin burrs according to the present invention, FIG. 2 is a cross-sectional view of a semiconductor device that can be achieved by the present invention,
FIG. 3 is a sectional view illustrating a resin molding step of the present invention;
FIG. 4 is a cross-sectional view of a conventional semiconductor device, FIG. 5 is a cross-sectional view illustrating a conventional resin molding process, and FIG. 6 is a diagram illustrating a conventional process of removing resin burrs.

Claims (2)

(57)【特許請求の範囲】(57) [Claims] 【請求項１】金属板を打ち抜いて半導体素子固定用のタ
ブ部と複数本のリードとを有するリードフレームを形成
する工程と、 前記リードフレームは打ち抜き面に抜きダレを、反対面
に抜きバリを有し、 前記リードフレームの打ち抜き面と反対の面に半導体素
子を固着する工程と、 前記半導体素子の電極と前記リードフレームのリードと
を金属細線にて電気的に接続する工程と、 前記リードフレームをモールド金型に設置し、前記リー
ドフレームの打ち抜き面側から樹脂を注入し、前記リー
ドフレームの隙間から前記リードフレームの打ち抜け面
とは反対の面へ樹脂を回り込ませるようにして樹脂モー
ルドする工程と、を具備することを特徴とする半導体装
置の製造方法。1. A step of punching a metal plate to form a lead frame having a tab portion for fixing a semiconductor element and a plurality of leads, wherein the lead frame has a punch sag on a punch surface and a punch burr on an opposite surface. A step of fixing a semiconductor element to a surface of the lead frame opposite to a punched surface; a step of electrically connecting an electrode of the semiconductor element to a lead of the lead frame with a thin metal wire; Is placed in a mold, resin is injected from the punched surface side of the lead frame, and the resin is molded so that the resin flows from the gap of the lead frame to the surface opposite to the punched surface of the lead frame. And a method for manufacturing a semiconductor device. 【請求項２】金属板を打ち抜いて半導体素子固定用のタ
ブ部と複数本のリードとを有するリードフレームを形成
する工程と、 前記リードフレームは打ち抜き面に抜きダレを、反対面
に抜きバリを有し、 前記リードフレームの打ち抜き面と反対の面に半導体素
子を固着する工程と、 前記半導体素子の電極と前記リードフレームのリードと
を金属細線にて電気的に接続する工程と、 前記リードフレームをモールド金型に設置し、前記リー
ドフレームの打ち抜き面側から樹脂を注入し、前記リー
ドフレームの隙間から前記リードフレームの打ち抜け面
とは反対の面へ樹脂を回り込ませるようにして樹脂モー
ルドする工程と、 前記樹脂モールドによって前記リード間に生じた樹脂バ
リを、前記リードフレームの打ち抜き面と逆の方向から
パンチを挿入して除去する工程と、 前記リードをカットし、所定形状に折り曲げる工程と、
を具備することを特徴とする半導体装置の製造方法。2. A step of punching a metal plate to form a lead frame having a tab portion for fixing a semiconductor element and a plurality of leads, wherein the lead frame has a punch sag on a punch surface and a punch burr on an opposite surface. A step of fixing a semiconductor element to a surface of the lead frame opposite to a punched surface; a step of electrically connecting an electrode of the semiconductor element to a lead of the lead frame with a thin metal wire; Is placed in a mold, resin is injected from the punched surface side of the lead frame, and the resin is molded so that the resin flows from the gap of the lead frame to the surface opposite to the punched surface of the lead frame. And punching a resin burr generated between the leads by the resin mold from a direction opposite to a punching surface of the lead frame. Removing by entering, cutting the lead, the step of bending into a predetermined shape,
A method for manufacturing a semiconductor device, comprising:
JP1208146A 1989-08-10 1989-08-10 Method for manufacturing semiconductor device Expired - Lifetime JP2589184B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1208146A JP2589184B2 (en) 1989-08-10 1989-08-10 Method for manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1208146A JP2589184B2 (en) 1989-08-10 1989-08-10 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPH0371647A JPH0371647A (en) 1991-03-27
JP2589184B2 true JP2589184B2 (en) 1997-03-12

Family

ID=16551399

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1208146A Expired - Lifetime JP2589184B2 (en) 1989-08-10 1989-08-10 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2589184B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100552353B1 (en) * 1992-03-27 2006-06-20 가부시키가이샤 히타치초엘에스아이시스템즈 Leadframe Semiconductor Integrated Circuit Device Using the Same and Method of and Process for Fabricating the Two

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55157235A (en) * 1979-05-25 1980-12-06 Nec Corp Manufacture of semiconductor integrated circuit
JPH0230152A (en) * 1988-07-19 1990-01-31 Nec Corp Manufacture of semiconductor device

Also Published As

Publication number Publication date
JPH0371647A (en) 1991-03-27

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