JPS615578A - Thin film transistor - Google Patents
Thin film transistorInfo
- Publication number
- JPS615578A JPS615578A JP12611284A JP12611284A JPS615578A JP S615578 A JPS615578 A JP S615578A JP 12611284 A JP12611284 A JP 12611284A JP 12611284 A JP12611284 A JP 12611284A JP S615578 A JPS615578 A JP S615578A
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- amorphous silicon
- film transistor
- layer
- silicon layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000010409 thin film Substances 0.000 title claims abstract description 29
- 229910021417 amorphous silicon Inorganic materials 0.000 claims abstract description 28
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims abstract description 15
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims abstract description 9
- 229910052799 carbon Inorganic materials 0.000 claims abstract description 9
- 239000004065 semiconductor Substances 0.000 claims abstract description 8
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 7
- 239000010408 film Substances 0.000 claims abstract description 7
- 229910052757 nitrogen Inorganic materials 0.000 claims abstract description 7
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 7
- 239000001301 oxygen Substances 0.000 claims abstract description 7
- 229910052751 metal Inorganic materials 0.000 claims abstract description 6
- 239000002184 metal Substances 0.000 claims abstract description 6
- 239000000758 substrate Substances 0.000 claims abstract description 6
- 239000007789 gas Substances 0.000 abstract description 16
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 abstract description 8
- 229910000077 silane Inorganic materials 0.000 abstract description 8
- 229910052581 Si3N4 Inorganic materials 0.000 abstract description 6
- VNWKTOKETHGBQD-UHFFFAOYSA-N methane Chemical compound C VNWKTOKETHGBQD-UHFFFAOYSA-N 0.000 abstract description 6
- 238000000034 method Methods 0.000 abstract description 6
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 abstract description 6
- 239000011521 glass Substances 0.000 abstract description 5
- XYFCBTPGUUZFHI-UHFFFAOYSA-N Phosphine Chemical compound P XYFCBTPGUUZFHI-UHFFFAOYSA-N 0.000 abstract description 4
- 238000001312 dry etching Methods 0.000 abstract description 4
- 238000011109 contamination Methods 0.000 abstract description 3
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 abstract description 2
- 229910000073 phosphorus hydride Inorganic materials 0.000 abstract description 2
- 239000004973 liquid crystal related substance Substances 0.000 description 7
- 229910021419 crystalline silicon Inorganic materials 0.000 description 4
- 230000007423 decrease Effects 0.000 description 4
- 238000005530 etching Methods 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- QGZKDVFQNNGYKY-UHFFFAOYSA-N Ammonia Chemical compound N QGZKDVFQNNGYKY-UHFFFAOYSA-N 0.000 description 2
- CURLTUGMZLYLDI-UHFFFAOYSA-N Carbon dioxide Chemical compound O=C=O CURLTUGMZLYLDI-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 238000009125 cardiac resynchronization therapy Methods 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 238000010894 electron beam technology Methods 0.000 description 2
- 239000011159 matrix material Substances 0.000 description 2
- 238000002156 mixing Methods 0.000 description 2
- 238000005268 plasma chemical vapour deposition Methods 0.000 description 2
- 239000002994 raw material Substances 0.000 description 2
- 238000012935 Averaging Methods 0.000 description 1
- MYMOFIZGZYHOMD-UHFFFAOYSA-N Dioxygen Chemical compound O=O MYMOFIZGZYHOMD-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 210000004460 N cell Anatomy 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000005275 alloying Methods 0.000 description 1
- 239000001569 carbon dioxide Substances 0.000 description 1
- 229910002092 carbon dioxide Inorganic materials 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910001873 dinitrogen Inorganic materials 0.000 description 1
- 229910001882 dioxygen Inorganic materials 0.000 description 1
- XLNZHTHIPQGEMX-UHFFFAOYSA-N ethane propane Chemical compound CCC.CCC.CC.CC XLNZHTHIPQGEMX-UHFFFAOYSA-N 0.000 description 1
- 230000010365 information processing Effects 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 229910052714 tellurium Inorganic materials 0.000 description 1
- PORWMNRCUJJQNO-UHFFFAOYSA-N tellurium atom Chemical compound [Te] PORWMNRCUJJQNO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78684—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys
- H01L29/78687—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising semiconductor materials of Group IV not being silicon, or alloys including an element of the group IV, e.g. Ge, SiN alloys, SiC alloys with a multilayer structure or superlattice structure
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本特許は非晶質シリコンを用いた薄膜トランジスタ特に
ＯＦＦ抵抗や高い非晶質シリコンを用いた薄膜トランジ
スタに関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) This patent relates to a thin film transistor using amorphous silicon, particularly a thin film transistor using amorphous silicon with high OFF resistance.
（従来技術とその問題点）
最近、パーソナルコンビーータや各種情報処理機器を小
型化することが望まれている。この中で最も小型化しに
くいものの１つにディスプレイがあげられる。現在ディ
スプレイの大部分はＣＲＴであるが、ＣＲＴは真空中で
電子線を電界等で制御して螢光体に照射し発光させるた
め、電子線を走査する部分だけ装置が厚くなり、小型化
が困難である。ディスプレイを小型化にすることを目的
とした液晶を用いた薄型のディスプレイの開発が注目さ
れている。この液晶ディスプレイは電極が付いた２枚の
ガラス板の間にｌＯミクロン厚程度の液晶をはさみ、２
枚のガラ大板についた走査電極によって液晶に電界を印
加し、液晶の動きを制御するために、真空中の電子の走
向を制御するＣ、ＢＴと比較して薄いディスプレイが可
能になる。しかし、液晶を動作させる場合１例えば電圧
平均化法では単純なＸＹマ） ＩＪクス動作では絵素数
が増加した時コントラストが低下する問題があった。こ
のコントラストの低下を解決する方法どして薄膜トラン
ジスタを用いたアクティブマトリクス動作法が研究され
ている。ここで用いられる薄膜材料′には多結晶８ｉや
テルル、非晶質シリコンなどを用いたものがあるが、低
温プロセスで低価格の基板が使えることや安定で量産し
やすいという特徴を有する非晶質シリコンが最も適して
いる。(Prior art and its problems) Recently, there has been a desire to downsize personal computer beaters and various information processing devices. Among these, displays are one of the things that is most difficult to miniaturize. Currently, the majority of displays are CRTs, but in a CRT, electron beams are controlled in a vacuum using an electric field, etc. to irradiate a phosphor to emit light, so the device becomes thicker in the area where the electron beams are scanned, making it easier to downsize. Have difficulty. 2. Description of the Related Art The development of thin displays using liquid crystals is attracting attention for the purpose of downsizing displays. This liquid crystal display consists of a liquid crystal about 10 microns thick sandwiched between two glass plates with electrodes attached.
Since an electric field is applied to the liquid crystal using scanning electrodes attached to two large glass plates, and the movement of the liquid crystal is controlled, a thinner display is possible compared to C and BT, which control the direction of electrons in a vacuum. However, when operating a liquid crystal (for example, in a voltage averaging method using a simple XY matrix), in an IJ operation, there is a problem in that the contrast decreases as the number of picture elements increases. An active matrix operation method using thin film transistors is being researched as a method to solve this decrease in contrast. Thin film materials used here include those using polycrystalline 8i, tellurium, amorphous silicon, etc.; High quality silicone is the most suitable.
非晶質シリコンを用いた薄膜トランジスタをこのような
平面ディスプレイに応用する場合１画素欠陥のないディ
、スプレィを得るためには薄膜トランジスタのＯＮ抵抗
とＯＦＦ抵抗の比が十分大きい薄膜トランジスタ素子が
大面積に均一に形成できることが必要となる。When applying a thin film transistor using amorphous silicon to such a flat display, in order to obtain a display without a single pixel defect, the thin film transistor element must have a sufficiently large ratio of ON resistance to OFF resistance and be uniform over a large area. It is necessary to be able to form
従来の薄膜トランジスタは第１図にその構造を示す様に
ゲート金属が付いたガラス等の絶縁性基板上にプラズマ
ＣＶＤ法を用いて例えば窒化シリコン層、 ｎ−非晶質
シリコン層、りん等を０．１〜１％ドープしたｎ子弁晶
質シリコン層を形成し。As shown in Figure 1, a conventional thin film transistor has a structure in which, for example, a silicon nitride layer, an n-amorphous silicon layer, phosphorus, etc. are deposited on an insulating substrate such as glass with a gate metal using the plasma CVD method. .1 to 1% doped n-child crystalline silicon layer is formed.
その後ソース−ドレイン電極を形成した後、ゲート金属
上のｎ子弁晶質シリコン層をエツチングして薄膜トラン
ジスタを作製していた。また最後に表面の安定化を計る
ためや遮光膜を設置するために窒化シリコン等のベッシ
ベーシｌン用絶縁層を形成する。しかし、このｎ子弁晶
質シリコン層を工、チングする工程や窒化シリコン等の
パッジベージ目ン膜を形成する時にｎ−非晶質シリコン
層表面の抵、抗値が減少し、薄膜トランジスタのＯＦＦ
抵抗が小さくなり、平面ディスプレイにした時に画像欠
陥となって歩どまり低下の原因となりていた。Thereafter, after forming source-drain electrodes, the n-type crystalline silicon layer on the gate metal was etched to fabricate a thin film transistor. Finally, an insulating layer for the bass basin, such as silicon nitride, is formed in order to stabilize the surface and provide a light shielding film. However, during the process of etching and etching this n-amorphous silicon layer or when forming a padding film such as silicon nitride, the surface resistance of the n-amorphous silicon layer decreases, and the thin film transistor becomes OFF.
The resistance became smaller, which caused image defects and lower yields when flat displays were produced.
（発明の目的）
本発明はこのような従来の欠点を除去せしめてＯＦＦ抵
抗の高い薄膜トランジスタを提供することにある。(Object of the Invention) An object of the present invention is to eliminate such conventional drawbacks and provide a thin film transistor with high OFF resistance.
（発明の構成）
本発明によれば絶縁性基板上にゲート金属、ゲート絶縁
膜非晶質シリコンを基体とした半導体層とオーミック層
、ソース・ドレイン電極からなる積層構造薄膜トランジ
スタにおいて前記半導体層の１部に１％以上７０チ未満
の炭素、窒素及び酸素の少なくとも一つ以上の元素を含
ませてなることを特徴とする薄膜トランジスタが得られ
る、（発明の概要）
本発明は上述の構成をとることにより従来のような薄膜
トランジスタのＯＦＦ抵抗が小さくなることを解決した
。すなわち従来構造におけるＯＦＦ抵抗低下の原因は抵
抗率１０’−１０’Ω１のｎ−非晶質シリコン層がドラ
イエツチング時のプラズマ損傷を受けることや表面汚染
によって抵抗率が１桁から２桁程度小さくなってしまっ
たことと考えられるが１本発明ではれ一非晶質シリコン
層内に抵抗率の大きい酸素、窒素や炭素の少なくとも１
つ以上の元素を含んだ非晶質シリコン合金を設けること
によりドライエツチングや汚染等により表面の抵抗率が
小さくなったとしても十分な抵抗率を保持させることが
できるようにした。この時、上記元°素は１チ以上の濃
度で非晶質シリコン内に混入させることが抵抗率を高め
る上で必要であり、デバイス動作時のキャリアの走向を
考慮すると７０チ以下の濃度で非晶質シリコンとの合金
化をおさえる必要がある。このようにすることにより、
薄膜トランジスタのＯＦＦ抵抗を安定的に大きくするこ
とができ、薄膜トランジスタを多数使用したディスプレ
イの歩どまりを向上させることができる。また別の効果
として、上記元素が含まれている非晶質トリコンはエツ
チング速度が比較的遅く非晶質シリコンとのエツチング
速度差を利用して均一性良くｎ＋非晶質シリコン層をエ
ツチングすることができる。これはＯＦＦ抵抗の高い薄
膜トランジスタが再現性良く得られるもう一つの理由で
ある。(Structure of the Invention) According to the present invention, in a thin film transistor with a laminated structure consisting of a gate metal, a gate insulating film, a semiconductor layer based on amorphous silicon, an ohmic layer, and source/drain electrodes on an insulating substrate, one of the semiconductor layers is There is obtained a thin film transistor characterized in that at least one element of carbon, nitrogen, and oxygen is contained in a portion of the thin film transistor in an amount of 1% or more and less than 70%. This solves the problem of reducing the OFF resistance of conventional thin film transistors. In other words, the cause of the decrease in OFF resistance in the conventional structure is that the n-amorphous silicon layer, which has a resistivity of 10'-10'Ω1, is plasma damaged during dry etching and the resistivity is reduced by one to two orders of magnitude due to surface contamination. However, in the present invention, at least one of oxygen, nitrogen, and carbon having high resistivity is added to the amorphous silicon layer.
By providing an amorphous silicon alloy containing three or more elements, sufficient resistivity can be maintained even if the surface resistivity is reduced due to dry etching, contamination, etc. At this time, it is necessary to mix the above elements into the amorphous silicon at a concentration of 1 or more in order to increase the resistivity, and considering the direction of carriers during device operation, it is necessary to mix the above elements into the amorphous silicon at a concentration of 70 or less. It is necessary to suppress alloying with amorphous silicon. By doing this,
The OFF resistance of a thin film transistor can be stably increased, and the yield of a display using a large number of thin film transistors can be improved. Another effect is that amorphous tricone containing the above elements has a relatively slow etching speed, and by utilizing the difference in etching speed with amorphous silicon, the n+ amorphous silicon layer can be etched with good uniformity. Can be done. This is another reason why thin film transistors with high OFF resistance can be obtained with good reproducibility.
本発明においては、ｎ−非晶質シリコン層に炭素、窒素
又は酸素を含んだ非晶質シリコン層を設けることでＯＦ
Ｆ抵抗の高い薄膜トランジスタを得、ることができる。In the present invention, by providing an amorphous silicon layer containing carbon, nitrogen or oxygen in the n-amorphous silicon layer, OF
A thin film transistor with high F resistance can be obtained.
（実施例）
以下５本発明の実栴例について図面を参照して説明する
。第２図は本発明あ実施例を示す断面図である。ガラス
基板１上にゲート金属であるクロム電極２を１０００＾
真空蒸着し、フォトリウグラフィにより幅２０μｍに加
工する。続いてシランガスとアンモニアガスの混合ガス
をプラズマＣＶＤ装置を用いグロー放電分解して窒化シ
リコン層３を３０００＾形成し５次にシランガスのグロ
ー放電分解によりｎ−非晶質シリコン層４を１００ＯＡ
、シランガスにメタンガスを４０チ混合したガスをグロ
ー放電分解してｎ−非晶質３ｉ、０ｌ−ｘ（＊ −’ｏ
、ｏｓ ）層５を１５００＾、シランにホスフィンを１
０００ ｐ％混合したガスをグロー放電分解してｎ＋非
非晶質シロ３フ
レイン電極７であるモリブデンを２０００λ形成し。(Example) Five practical examples of the present invention will be described below with reference to the drawings. FIG. 2 is a sectional view showing an embodiment of the present invention. A chromium electrode 2, which is a gate metal, is placed on a glass substrate 1 at a thickness of 1000^.
It is vacuum deposited and processed into a width of 20 μm by photolithography. Subsequently, a mixed gas of silane gas and ammonia gas is decomposed by glow discharge using a plasma CVD device to form a silicon nitride layer 3 of 3000 OA, and then an n-amorphous silicon layer 4 of 100 OA is formed by glow discharge decomposition of silane gas.
, glow discharge decomposition of a mixture of silane gas and methane gas to form n-amorphous 3i, 0l-x (* -'o
, os) 1500^ for layer 5, 1 phosphine for silane
000 p% of the mixed gas was decomposed by glow discharge to form 2000 λ of molybdenum, which is the n+ amorphous white 3-frain electrode 7.
ＣＦ，を用いたドライエツチングにより、ゲート長が１
００μｍ，ゲート幅が１０μｍになるようにソース・ド
レイン電極およびｎ子弁晶質シリコンをエツチングし、
トランジスタ構造とする．さらに表面安定のために窒化
シリコン等の絶縁物をパッジベージ日ン膜として被覆す
る。ここでは非晶質シリコンの高抵抗化に炭素元素を混
入する方法としてシランとメタンの混合ガスを用いてい
るが、他の炭素を含むガス例えばエタン会プロパン等の
ガスを原料ガスとして用いたとしても有効に作用する．
また酸素、あるいは窒素を非晶質シリコン内に混合する
場合には，酸素ガス、炭酸ガス、Ｎ，０ガス、ＮＯ，ガ
スあるいは窒素ガス、アンモニアガスを原料ガスとして
用いれば艮い。The gate length was reduced to 1 by dry etching using CF.
Etch the source/drain electrodes and n-type crystalline silicon so that the gate width is 00 μm and the gate width is 10 μm.
It has a transistor structure. Further, to stabilize the surface, an insulating material such as silicon nitride is coated as a padding film. Here, a mixed gas of silane and methane is used as a method of mixing carbon elements to increase the resistance of amorphous silicon, but other carbon-containing gases such as ethane propane may also be used as the raw material gas. also works effectively.
Further, when mixing oxygen or nitrogen into amorphous silicon, oxygen gas, carbon dioxide gas, N,0 gas, NO gas, nitrogen gas, or ammonia gas may be used as the raw material gas.
（発明の効果）
この薄膜トランジスタを用いて１２８Ｘ６４素子の液晶
駆動用薄膜トランジスタアレイを試作してその静特性を
評価した．その結果ゲート電圧１５Ｖ、ソース・ドレイ
ン間鴫圧１５ｖでの平均ＯＮ電流は１、２ Ｘ１Ｏ−ｓ
Ａ， 平均０ＦＦ１［、ｉＧｔ １．６ ＸＩＯ”−”
Ａ テあり１画像欠陥の恐れのあるｌＸｌｏＡ以上の
ＯＦＦ電流が流れる素子は全体の０．５チ 以下におさ
えることができた。これに対し、従来の薄膜トランジス
タを用いた場合には平均ＯＮ鑞流３．４×１Ｏ−５Ａ．
平均ＯＦＦ電流２．３ Ｘ １０−”Ａ であり、平
均的なＯＮ ０ＦＩＳ比は十分あるものの、ＯＦＦ’電
流１０ １０Å以上の素子が全体の４チ含まれていた．
このように本発明によって０ＦＦ−ｔｌ流の小さい薄膜
トランジスタを安定的に製造できることが明らかになつ
た．
１(Effects of the Invention) Using this thin film transistor, a 128x64 element thin film transistor array for driving a liquid crystal was prototyped and its static characteristics were evaluated. As a result, the average ON current at a gate voltage of 15V and a source-drain voltage of 15V is 1.2 X1O-s
A, Average 0FF1 [, iGt 1.6 XIO”-”
A. With Te 1 The number of elements in which an OFF current of 1XloA or more flows, which may cause image defects, was kept to less than 0.5 of the total. In contrast, when conventional thin film transistors are used, the average ON current is 3.4×1O-5A.
The average OFF current was 2.3 x 10-''A, and although the average ON 0FIS ratio was sufficient, four of the devices contained OFF' currents of 1010 Å or more.
As described above, it has become clear that thin film transistors with a small 0FF-tl current can be stably manufactured by the present invention.
1
第１図は従来の薄膜トランジスタの断面図、第２図は本
発明の一実施例を説明するための薄膜トランジスタの断
面図である。
ｌ・・・絶縁性基板，２・・・ゲート電極，３・・・絶
縁体層、４・・・ｎ−非晶質シリコン半導体層， ５・
・・炭素を含む非晶質シリコン半導体層、６・・・ｎ子
弁晶質シリコン半導体層、７・・・ソース電極，８・−
・ドレインｇＬ ９・・・パッシベイション膜。FIG. 1 is a sectional view of a conventional thin film transistor, and FIG. 2 is a sectional view of a thin film transistor for explaining an embodiment of the present invention. l... insulating substrate, 2... gate electrode, 3... insulator layer, 4... n-amorphous silicon semiconductor layer, 5.
...Amorphous silicon semiconductor layer containing carbon, 6...N-cell crystalline silicon semiconductor layer, 7...Source electrode, 8.-
・Drain gL 9... Passivation film.
Claims (1)
リコンを基体とした半導体層、オーミック層、ソース・
ドレイン電極からなる積層構造薄膜トランジスタにおい
て、前記半導体層の１部に１％以上７０％未満の炭素、
窒素又は酸素の少なくとも一つ以上の原素を含ませてな
ることを特徴とする薄膜トランジスタ。Gate metal, gate insulating film, semiconductor layer based on amorphous silicon, ohmic layer, source layer, etc. are formed on an insulating substrate.
In a laminated thin film transistor consisting of a drain electrode, a portion of the semiconductor layer contains 1% or more and less than 70% carbon,
A thin film transistor characterized by containing at least one element of nitrogen or oxygen.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12611284A JPS615578A (en) | 1984-06-19 | 1984-06-19 | Thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12611284A JPS615578A (en) | 1984-06-19 | 1984-06-19 | Thin film transistor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS615578A true JPS615578A (en) | 1986-01-11 |
Family
ID=14926924
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12611284A Pending JPS615578A (en) | 1984-06-19 | 1984-06-19 | Thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS615578A (en) |
Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5221631A (en) * | 1989-02-17 | 1993-06-22 | International Business Machines Corporation | Method of fabricating a thin film transistor having a silicon carbide buffer layer |
| JPH0783526A (en) * | 1993-09-13 | 1995-03-28 | Hitachi Ltd | Compression type refrigerator |
| EP0744776A2 (en) * | 1995-05-25 | 1996-11-27 | Central Glass Company, Limited | Amorphous silicon thin film transistor and method preparing same |
| WO2008126884A1 (en) * | 2007-04-05 | 2008-10-23 | Fujifilm Corporation | Organic electroluminescent display device |
| WO2008126878A1 (en) * | 2007-04-10 | 2008-10-23 | Fujifilm Corporation | Organic electroluminescence display device |
| JP2008276211A (en) * | 2007-04-05 | 2008-11-13 | Fujifilm Corp | Organic electroluminescent display device and patterning method |
| JP2009021554A (en) * | 2007-06-11 | 2009-01-29 | Fujifilm Corp | Electronic display |
| JP2009094465A (en) * | 2007-09-21 | 2009-04-30 | Fujifilm Corp | Radiation imaging element |
| WO2009093410A1 (en) * | 2008-01-25 | 2009-07-30 | Sharp Kabushiki Kaisha | Semiconductor element and method for manufacturing the same |
| JP2009212476A (en) * | 2007-03-27 | 2009-09-17 | Fujifilm Corp | Thin film field effect transistor and display using the same |
| JP2010016126A (en) * | 2008-07-02 | 2010-01-21 | Fujifilm Corp | Thin film field effect transistor, fabrication process therefor, and display device using the same |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58199564A (en) * | 1982-05-17 | 1983-11-19 | Canon Inc | Semiconductor element |
| JPS60111472A (en) * | 1983-11-22 | 1985-06-17 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JPS60113971A (en) * | 1983-11-26 | 1985-06-20 | Matsushita Electric Ind Co Ltd | Thin-film field-effect type semiconductor device and manufacture thereof |
-
1984
- 1984-06-19 JP JP12611284A patent/JPS615578A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58199564A (en) * | 1982-05-17 | 1983-11-19 | Canon Inc | Semiconductor element |
| JPS60111472A (en) * | 1983-11-22 | 1985-06-17 | Matsushita Electric Ind Co Ltd | Semiconductor device |
| JPS60113971A (en) * | 1983-11-26 | 1985-06-20 | Matsushita Electric Ind Co Ltd | Thin-film field-effect type semiconductor device and manufacture thereof |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5221631A (en) * | 1989-02-17 | 1993-06-22 | International Business Machines Corporation | Method of fabricating a thin film transistor having a silicon carbide buffer layer |
| JPH0783526A (en) * | 1993-09-13 | 1995-03-28 | Hitachi Ltd | Compression type refrigerator |
| EP0744776A2 (en) * | 1995-05-25 | 1996-11-27 | Central Glass Company, Limited | Amorphous silicon thin film transistor and method preparing same |
| EP0744776A3 (en) * | 1995-05-25 | 1997-11-26 | Central Glass Company, Limited | Amorphous silicon thin film transistor and method preparing same |
| JP4727684B2 (en) * | 2007-03-27 | 2011-07-20 | 富士フイルム株式会社 | Thin film field effect transistor and display device using the same |
| JP2015038895A (en) * | 2007-03-27 | 2015-02-26 | 富士フイルム株式会社 | Thin-film field-effect transistor and display device using the same |
| US8178926B2 (en) | 2007-03-27 | 2012-05-15 | Fujifilm Corporation | Thin film field effect transistor and display |
| JP2009212476A (en) * | 2007-03-27 | 2009-09-17 | Fujifilm Corp | Thin film field effect transistor and display using the same |
| WO2008126884A1 (en) * | 2007-04-05 | 2008-10-23 | Fujifilm Corporation | Organic electroluminescent display device |
| JP2008276212A (en) * | 2007-04-05 | 2008-11-13 | Fujifilm Corp | Organic electroluminescent display device |
| JP2008276211A (en) * | 2007-04-05 | 2008-11-13 | Fujifilm Corp | Organic electroluminescent display device and patterning method |
| WO2008126878A1 (en) * | 2007-04-10 | 2008-10-23 | Fujifilm Corporation | Organic electroluminescence display device |
| JP2009021554A (en) * | 2007-06-11 | 2009-01-29 | Fujifilm Corp | Electronic display |
| JP2009094465A (en) * | 2007-09-21 | 2009-04-30 | Fujifilm Corp | Radiation imaging element |
| WO2009093410A1 (en) * | 2008-01-25 | 2009-07-30 | Sharp Kabushiki Kaisha | Semiconductor element and method for manufacturing the same |
| US8378348B2 (en) | 2008-01-25 | 2013-02-19 | Sharp Kabushiki Kaisha | Semiconductor element and method for manufacturing the same |
| JP2010016126A (en) * | 2008-07-02 | 2010-01-21 | Fujifilm Corp | Thin film field effect transistor, fabrication process therefor, and display device using the same |
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