JPH0454992B2 - - Google Patents
Info
- Publication number
- JPH0454992B2 JPH0454992B2 JP57224945A JP22494582A JPH0454992B2 JP H0454992 B2 JPH0454992 B2 JP H0454992B2 JP 57224945 A JP57224945 A JP 57224945A JP 22494582 A JP22494582 A JP 22494582A JP H0454992 B2 JPH0454992 B2 JP H0454992B2
- Authority
- JP
- Japan
- Prior art keywords
- sih
- tft
- thin film
- film
- gas
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000010408 film Substances 0.000 claims description 29
- 239000007789 gas Substances 0.000 claims description 18
- 239000010409 thin film Substances 0.000 claims description 18
- 239000004065 semiconductor Substances 0.000 claims description 14
- 238000004519 manufacturing process Methods 0.000 claims description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 238000005268 plasma chemical vapour deposition Methods 0.000 claims description 7
- 239000000203 mixture Substances 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000005669 field effect Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 238000005259 measurement Methods 0.000 description 3
- 238000000206 photolithography Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- 238000002474 experimental method Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910018487 Ni—Cr Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 229910006404 SnO 2 Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 229910052980 cadmium sulfide Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000007865 diluting Methods 0.000 description 1
- 238000005566 electron beam evaporation Methods 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Inorganic materials [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Formation Of Insulating Films (AREA)
Description
本発明は薄膜トランジスタ（Thin Film
Transistor、以下TFTと略す）と呼ばれる半導
体薄膜を用いた電界効果トランジスタの製造方法
に係り、特にアモルフアスSi（以下ａ−Siと略す）
を半導体薄膜としたTFTの絶縁薄膜の製造方法
に関するものである。
第１図はTFTの一般的な断面構造の一例であ
り、ガラス、セラミツクなどの絶縁物基板１の上
に電界効果トランジスタとしてのゲート電極２が
MoやNiなどの金属、Ni−Crなどの合金或いは
必要があればIn2O3、SnO2、ITOなどの透明導電
性材料で形成されている。ゲート電極２に接する
薄膜層３は絶縁物薄膜であつて、その材料として
はSiO、SiO2、Al2O3などの酸化膜或いはSi3N4
などの窒化膜により形成される。ソース電極４、
ドレイン電極５に接する薄膜層６は半導体薄膜で
あつて、Se、CdS、GaAs、Ge、Siなどの半導体
材料が用いられるのであるが、この半導体薄膜６
は蒸着法、CVD法、プラズマCVD法などで形成
されるので通常多結晶或いはアモルフアス（非晶
質）となる。
このTFTは電界効果トランジスタであつて、
半導体層６の表面に形成されるチヤンネルを通し
てソース電極からドレイン電極へ流れる電流を絶
縁膜３を介してゲート電極２に与える電圧によつ
て制御するものである。
このTFTは、用いられる半導体薄膜が単結晶
である必要がないので基板の選択が容易であるこ
と、大面積のものが得られること、製造工程が比
較的簡単であることなどの理由で種々の装置に組
み合わせて最近広く用いられるようになつてき
た。特に液晶を用いた二次元表示装置の液晶駆動
用スイツチング素子としてその特性改善が研究さ
れ、また種々の材料を用いたTFTが研究開発さ
れている。
このTFTの特性を左右するものは大きく分け
て２つになる。その１つはチヤンネル長やチヤン
ネル幅などの形状因子であり、他の１つは半導体
層の移動度、絶縁膜の局在準位、トラツプなどの
物性因子であるが、前者は設計可能な因子である
ので、後者の因子の制御が重要なのである。
最近特性が比較的安定したTFTとして実用化
が進められているのは、半導体薄膜としてａ−Si
を用い、絶縁薄膜として窒化シリコン膜を用いた
ものであるが、これらの薄膜は通常プラズマ
CVD法で形成されることが多い。しかしながら、
そのようなTFTにおいても種々の問題点ないし
欠点が存在し、特性が本当の意味で安定していな
いのが実情である。これは半導体層の性質の安定
性にも問題があるが、絶縁膜の性質の不安定性が
TFTの駆動ゲート電圧の大小、ドレイン電流、
スレツシヨルド電圧（TFTが正常動作を始める
ドレイン電圧の最低値）に与える影響は大きく
TFTの特性及びその安定性を大きく左右してい
たのである。
本発明は、半導体層としてａ−Siをまた絶縁層
として窒化シリコン膜をグロー放電によるプラズ
マCVD法で形成したTFTにおいて、新たに見出
された絶縁膜の製作条件を提供することによつて
TFTの特性及びその安定性を向上させようとす
るものである。
以下、本発明の一実施例について説明する。
絶縁層である窒化シリコン膜（Si3N4）をプラ
ズマCVD法を用いて形成する場合、現在用いら
れるガスは１つはSiH4−N2系であり、もう１つ
はSiH4−NH3系であり、希釈するガスとしては
N2，Arガスなどである。今までは得られる膜の
組成（Ｎ／Si比）或いは膜の歪などが着目され、
組成が同じでも膜の歪、局在準位が少なそうであ
るなどの理由からSiH4−NH3系がより多く用い
られている。これら２つの混合ガス系を比較して
みると、実験結果として次のような傾向が得られ
た。すなわち、SiH4−N2系による絶縁層のTFT
の場合、ゲート電圧Vg＝０におけるドレイン電
流Id（すなわち、TFTのOFF電流）は小さくて良
いのであるが、スレツシヨルド電圧Vthが大きく
また変動しやすい傾向があつた。Vthの移動と変
動が大きいことは液晶などを用いた二次元表示装
置の一定電圧による駆動ができないといつた大き
な問題点を生じさせる。この原因は断定できない
が窒化シリコン膜の局在準位による窒化シリコン
膜と半導体層との電荷のやりとりに起因すると思
われる。
一方、SiH4−NH3系による絶縁層のTFTの場
合、Vthは比較的小さくまた変動は少ないが、
Vg＝０におけるId、すなわちTFTのOFF電流が
大きく、従つてON−OFF比が大きくとれずスイ
ツチング特性が良くないという問題点が生じる。
これもまた原因を断定できないが、半導体層であ
るａ−Siの極く表面に反転層を形成せしめるよう
な要因を絶縁層が有しているものと思われる。
本発明者等はこの２つの系のそれぞれの長所を
生かしながら安定したTFTを得るガスの条件を
探すべく実験した結果、SiH4−NH3−N2なる混
合ガスにH2ガスを加えたSiH4−NH3−N2−H2
において良好な結果が得られることを見出したの
である。
本発明の内容を以下の実施例によつて更に詳し
く説明する。まずTFTの製作工程及び形状は次
の通りである。
(1) ガラス基板（コーニング7059）上にMoを電
子ビーム蒸着で約1000Å厚みで形成し、写真蝕
刻法で幅70μｍの線としゲート電極とする。
(2) 次にグロー放電によるプラズマCVD法で窒
化シリコン膜を2000Å、更にその上にａ−Si膜
を3000Å形成する。
(3) 写真蝕刻法でゲート電極上にあるａ−Si層の
みを幅90μｍの線にする。
(4) その上にAlを約2000Å蒸着し、写真蝕刻法
によりチヤンネル長10μｍ、チヤンネル幅1.7mm
の大きさになるよう電極の分離を行いTFTを
完成する。
このような製作工程及び形状のTFTにおいて、
グロー放電によるプラズマCVD法の条件は次の
通りである。
The present invention relates to a thin film transistor (Thin Film Transistor).
It relates to a method for manufacturing a field effect transistor using a semiconductor thin film called Transistor (hereinafter abbreviated as TFT), especially amorphous Si (hereinafter abbreviated as a-Si).
The present invention relates to a method for manufacturing an insulating thin film of TFT using a semiconductor thin film. Figure 1 shows an example of a general cross-sectional structure of a TFT, in which a gate electrode 2 as a field effect transistor is placed on an insulating substrate 1 made of glass, ceramic, etc.
It is formed of a metal such as Mo or Ni, an alloy such as Ni-Cr, or, if necessary, a transparent conductive material such as In 2 O 3 , SnO 2 or ITO. The thin film layer 3 in contact with the gate electrode 2 is an insulating thin film, and its material is an oxide film such as SiO, SiO 2 , Al 2 O 3 or Si 3 N 4
It is formed from a nitride film such as. source electrode 4,
The thin film layer 6 in contact with the drain electrode 5 is a semiconductor thin film, and semiconductor materials such as Se, CdS, GaAs, Ge, and Si are used.
Since it is formed by vapor deposition, CVD, plasma CVD, etc., it is usually polycrystalline or amorphous. This TFT is a field effect transistor,
The current flowing from the source electrode to the drain electrode through the channel formed on the surface of the semiconductor layer 6 is controlled by the voltage applied to the gate electrode 2 via the insulating film 3. This TFT has been developed for various reasons, including the fact that the semiconductor thin film used does not need to be a single crystal, so it is easy to select a substrate, a large area can be obtained, and the manufacturing process is relatively simple. Recently, it has become widely used in combination with equipment. In particular, research has been conducted to improve the characteristics of switching elements for driving liquid crystals in two-dimensional display devices using liquid crystals, and TFTs using various materials are being researched and developed. There are broadly two things that affect the characteristics of this TFT. One is shape factors such as channel length and channel width, and the other is physical property factors such as mobility of semiconductor layer, localized level of insulating film, and traps, but the former is a factor that can be designed. Therefore, controlling the latter factor is important. The TFT that has recently been put into practical use with relatively stable characteristics is a-Si as a semiconductor thin film.
A silicon nitride film is used as the insulating thin film, but these thin films are usually exposed to plasma.
Often formed by CVD method. however,
The reality is that such TFTs have various problems and drawbacks, and their characteristics are not truly stable. This is a problem with the stability of the properties of the semiconductor layer, but it is also a problem with the instability of the properties of the insulating film.
The magnitude of TFT drive gate voltage, drain current,
It has a large effect on the threshold voltage (the lowest value of drain voltage at which the TFT starts operating normally).
This greatly influenced the characteristics and stability of TFTs. The present invention provides newly discovered insulating film manufacturing conditions for TFTs in which a-Si is used as a semiconductor layer and a silicon nitride film is used as an insulating layer by a plasma CVD method using glow discharge.
The aim is to improve the characteristics and stability of TFTs. An embodiment of the present invention will be described below. When forming a silicon nitride film (Si 3 N 4 ), which is an insulating layer, using the plasma CVD method, one of the gases currently used is SiH 4 -N 2 and the other is SiH 4 -NH 3 . system, and the diluting gas is
These include N 2 and Ar gas. Until now, the focus has been on the composition of the resulting film (N/Si ratio) or the strain of the film.
Even though the composition is the same, the SiH 4 -NH 3 system is more commonly used because it seems to have less distortion in the film and fewer localized levels. When comparing these two mixed gas systems, the following trends were obtained as experimental results. In other words, TFT with an insulating layer based on SiH 4 −N 2 system
In this case, the drain current Id (that is, the OFF current of the TFT) at gate voltage Vg=0 may be small, but the threshold voltage Vth tends to be large and fluctuate easily. The large movement and fluctuation of Vth causes a major problem such as the inability to drive a two-dimensional display device using a liquid crystal or the like with a constant voltage. Although the cause of this cannot be determined with certainty, it is thought to be caused by the exchange of charges between the silicon nitride film and the semiconductor layer due to localized levels in the silicon nitride film. On the other hand, in the case of a TFT with an insulating layer based on SiH 4 −NH 3 system, Vth is relatively small and has little variation, but
A problem arises in that Id at Vg=0, that is, the OFF current of the TFT is large, and therefore the ON-OFF ratio cannot be large, resulting in poor switching characteristics.
Although the cause of this cannot be determined, it is thought that the insulating layer has a factor that causes an inversion layer to be formed on the very surface of the a-Si semiconductor layer. The inventors of the present invention conducted experiments to find gas conditions that would provide a stable TFT while taking advantage of the respective advantages of these two systems. 4 −NH 3 −N 2 −H 2
They found that good results could be obtained. The content of the present invention will be explained in more detail with reference to the following examples. First, the manufacturing process and shape of the TFT are as follows. (1) Form Mo on a glass substrate (Corning 7059) to a thickness of approximately 1000 Å by electron beam evaporation, and use photolithography to form a line with a width of 70 μm to serve as the gate electrode. (2) Next, a silicon nitride film with a thickness of 2000 Å is formed using a plasma CVD method using glow discharge, and an a-Si film with a thickness of 3000 Å is further formed thereon. (3) Using photolithography, only the a-Si layer on the gate electrode is made into a 90 μm wide line. (4) Approximately 2000 Å of Al was vapor-deposited on it, and the channel length was 10 μm and the channel width was 1.7 mm by photolithography.
Complete the TFT by separating the electrodes so that they have the same size. In a TFT with such a manufacturing process and shape,
The conditions for the plasma CVD method using glow discharge are as follows.
【表】
上表から判るように、この実施例においては窒
化シリコン膜製作条件においてガス組成のみを(A)
SiH4−NH3−H2、(B)SiH4−N2−H2、(C)SiH4−
NH3−N2−H2と変えてTFTが製作されている。
これらの製作されたTFTのId−Vg特性を第２
図、第３図および第４図に示す。測定は暗室内
dryN2ガス中で行なつた。図中１，２は、それぞ
れ製作直後の特性１及び繰り返し測定後の特性２
を意味している。第２図から判るようにSiH4−
NH3−H2系においてはVthは約1.5V程度と移動
は小さいが、Vg＝０におけるIdが変動増加する
しまたその値も10-11〜10-10AとOFF電流は大き
い。また第３図から判るようにSiH4−N2−H2系
においてはVg＝０におけるIdは充分小さく
10-12A程度であるが、Vthの移動が３〜4V程度
と大きくなつてしまう。
このようにH2ガスの効果はSiH4−NH3系にお
いても、SiH4−N2系に不充分なのである。しか
るに第４図から判るようにSiH4−NH3系とSiH4
−N2系の混合の中にH2ガスをいれたSiH4−NH3
−N2−H2系においては、Vg＝０におけるIdも
10-12Aと充分に小さく、Vthの移動は約1.1Vで繰
り返し測定しても殆んど変動せず安定したTFT
が得られたのである。その原因を断定することは
現段階においてはできないが、SiH4−NH3−N2
系にH2ガスが加わることによつてTFTに用いら
れる窒化シリコン膜が良好になつて安定すること
が判明した。
SiH4、NH3、N2、H2の比率とTFTに適した
膜の性質との関係を種々の実験によつて調べたと
ころ次のような結果が得られた。
モル比NH3／SiH4、N2／SiH4が余り小さいと
絶縁膜の抵抗値が下がりゲート絶縁層としての機
能が低下する。一方、余り大きいと耐薬品、耐湿
性に乏しい絶縁膜となる。結果としてTFTとし
て満足できるモル比はNH3／SiH4＝２〜10，
N2／SiH4＝４〜20と考えられる。モル比H2／
SiH4は生膜速度と絶縁膜中のＨ濃度及び結合状
態に影響を与え、それによると思われるVthの変
動が観測された。TFTとして満足しうるモル比
はH2／SiH4＝１〜20が良いことが判つた。これ
らに加えて放電（RF）電力が小さいときには、
NH3／SiH4，N2／SiH4は上述した範囲において
大である方が、逆に放電（RF）電力が大きい時
には、NH3／SiH4、N2／SiH4を上述の範囲内で
小さくとる方がTFTに用いられる窒化シリコン
膜として良好となる傾向が見いだされている。い
ずれにしてもSiH4−NH3−N2ガス系にH2ガスを
混合してグロー放電によるプラズマCVD法で形
成された窒化シリコン膜は、スレツシヨルド電圧
およびドレイン電流の移動変動が小さく、ドレイ
ンOFF電流が小さいといつたように安定して良
好な特性をもつTFTを得るには極めて望ましい
性質を有しているものである。[Table] As can be seen from the table above, in this example, only the gas composition was changed to (A) under the silicon nitride film manufacturing conditions.
SiH 4 −NH 3 −H 2 , (B)SiH 4 −N 2 −H 2 , (C)SiH 4 −
TFT has been manufactured instead of NH 3 −N 2 −H 2 .
The Id-Vg characteristics of these fabricated TFTs are
3 and 4. Measurement is done in a dark room
Performed in dryN2 gas. 1 and 2 in the figure are characteristic 1 immediately after fabrication and characteristic 2 after repeated measurements, respectively.
It means. As can be seen from Figure 2, SiH 4 −
In the NH 3 -H 2 system, Vth is about 1.5V, which is a small movement, but Id at Vg=0 fluctuates and increases, and its value is 10 -11 to 10 -10 A, which is a large OFF current. Also, as can be seen from Figure 3, in the SiH 4 -N 2 -H 2 system, Id at Vg = 0 is sufficiently small.
Although it is about 10 -12 A, the movement of Vth becomes large, about 3 to 4 V. In this way, the effect of H 2 gas is insufficient for the SiH 4 -NH 3 system as well as for the SiH 4 -N 2 system. However, as shown in Figure 4, the SiH 4 -NH 3 system and the SiH 4
-SiH 4 -NH 3 containing H 2 gas in a mixture of -N 2
In the −N 2 −H 2 system, Id at Vg=0 is also
10 -12 A, which is sufficiently small, and the Vth movement is approximately 1.1V, making it a stable TFT with almost no fluctuation even after repeated measurements.
was obtained. Although it is not possible to determine the cause at this stage, SiH 4 −NH 3 −N 2
It was found that the addition of H 2 gas to the system improves and stabilizes the silicon nitride film used in TFTs. The relationship between the ratio of SiH 4 , NH 3 , N 2 , and H 2 and the properties of a film suitable for TFT was investigated through various experiments, and the following results were obtained. If the molar ratios NH 3 /SiH 4 and N 2 /SiH 4 are too small, the resistance value of the insulating film decreases and its function as a gate insulating layer deteriorates. On the other hand, if it is too large, the insulating film will have poor chemical resistance and moisture resistance. As a result, the molar ratio that can be satisfied as a TFT is NH 3 /SiH 4 = 2 to 10,
It is thought that N 2 /SiH 4 =4 to 20. Molar ratio H 2 /
SiH 4 affects the biofilm speed, H concentration and bonding state in the insulating film, and fluctuations in Vth were observed, which seems to be caused by this. It has been found that the molar ratio H 2 /SiH 4 =1 to 20 is satisfactory for TFT. In addition to these, when the discharge (RF) power is small,
It is better for NH 3 /SiH 4 and N 2 /SiH 4 to be within the above range, but conversely when the discharge (RF) power is large, NH 3 /SiH 4 and N 2 /SiH 4 should be within the above range. It has been found that the smaller the thickness, the better the silicon nitride film used in TFTs. In any case, the silicon nitride film formed by the plasma CVD method using glow discharge by mixing H 2 gas in the SiH 4 -NH 3 -N 2 gas system has small movement fluctuations in threshold voltage and drain current, and the drain is turned OFF. It has extremely desirable properties in order to obtain a TFT with stable and good characteristics, such as a small current.
第１図は一般的な薄膜トランジスタ（TFT）
の断面構造例。第２図は絶縁膜製作条件として
SiH4−NH3−H2ガスを用いた場合のTFTのId−
Vg特性例を示すグラフ。第３図は絶縁膜製作条
件としてSiH4−N2−H2ガスを用いた場合の
TFTのId−Vg特性例を示すグラフ。第４図は絶
縁膜製作条件として本発明によるSiH4−NH3−
N2−H2ガスを用いた場合のTFTのId−Vg特性
例を示すグラフである。
１……基板；２……ゲート電極；３……薄膜
層；４……ソース電極；５……ドレイン電極；６
……半導体薄膜。
Figure 1 shows a typical thin film transistor (TFT)
Example of cross-sectional structure. Figure 2 shows the insulating film manufacturing conditions.
Id− of TFT when using SiH 4 −NH 3 −H 2 gas
Graph showing an example of Vg characteristics. Figure 3 shows the case where SiH 4 −N 2 −H 2 gas is used as the insulating film manufacturing condition.
Graph showing an example of Id-Vg characteristics of TFT. Figure 4 shows SiH 4 −NH 3 − according to the present invention as the insulating film manufacturing conditions.
It is a graph showing an example of Id-Vg characteristics of TFT when N2 - H2 gas is used. 1... Substrate; 2... Gate electrode; 3... Thin film layer; 4... Source electrode; 5... Drain electrode; 6
...Semiconductor thin film.
Claims (1)
化シリコン膜をゲート絶縁層としてそれらをグロ
ー放電によるプラズマCVD法で形成する薄膜ト
ランジスタの製造方法において、上記ゲート絶縁
層を得るためのガス組成として、SiH4−NH3−
N2−H2の混合ガスを使用し、且つ上記ガスのモ
ル比がNH3／SiH4＝２〜10；N2／SiH4＝４〜
20；H2／SiH4＝１〜20の範囲にあるようにした
ことを特徴とする薄膜トランジスタの製造方法。1. In a method for manufacturing a thin film transistor in which an amorphous silicon film is used as a semiconductor layer and a silicon nitride film is used as a gate insulating layer and they are formed by a plasma CVD method using glow discharge, the gas composition for obtaining the gate insulating layer is SiH 4 − NH3−
A mixed gas of N 2 - H 2 is used, and the molar ratio of the above gases is NH 3 /SiH 4 = 2 to 10; N 2 /SiH 4 = 4 to
20; A method for manufacturing a thin film transistor, characterized in that H 2 /SiH 4 is in a range of 1 to 20.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22494582A JPS59115561A (en) | 1982-12-23 | 1982-12-23 | Manufacture of thin film transistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP22494582A JPS59115561A (en) | 1982-12-23 | 1982-12-23 | Manufacture of thin film transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS59115561A JPS59115561A (en) | 1984-07-04 |
| JPH0454992B2 true JPH0454992B2 (en) | 1992-09-01 |
Family
ID=16821650
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP22494582A Granted JPS59115561A (en) | 1982-12-23 | 1982-12-23 | Manufacture of thin film transistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS59115561A (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0680827B2 (en) * | 1988-08-12 | 1994-10-12 | 日本プレシジョン・サーキッツ株式会社 | Inverted stagger type amorphous silicon thin film transistor and manufacturing method thereof |
| JP2827637B2 (en) * | 1991-12-02 | 1998-11-25 | 日本電気株式会社 | Thin film transistor device and method of manufacturing the same |
| TW384515B (en) * | 1993-07-14 | 2000-03-11 | Frontec Inc | Electronic device and its manufacturing method |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5419662A (en) * | 1977-07-15 | 1979-02-14 | Hitachi Ltd | Forming method of plasma cvd film |
| JPS559427A (en) * | 1978-07-07 | 1980-01-23 | Hitachi Ltd | Manufacturing device of silicon nitride film |
| JPS55107234A (en) * | 1979-02-13 | 1980-08-16 | Hitachi Ltd | Method of monitoring deposition film quality |
| JPS56135968A (en) * | 1980-03-27 | 1981-10-23 | Canon Inc | Amorphous silicon thin film transistor and manufacture thereof |
| JPS5769778A (en) * | 1980-10-17 | 1982-04-28 | Matsushita Electric Ind Co Ltd | Semiconductor device |
-
1982
- 1982-12-23 JP JP22494582A patent/JPS59115561A/en active Granted
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5419662A (en) * | 1977-07-15 | 1979-02-14 | Hitachi Ltd | Forming method of plasma cvd film |
| JPS559427A (en) * | 1978-07-07 | 1980-01-23 | Hitachi Ltd | Manufacturing device of silicon nitride film |
| JPS55107234A (en) * | 1979-02-13 | 1980-08-16 | Hitachi Ltd | Method of monitoring deposition film quality |
| JPS56135968A (en) * | 1980-03-27 | 1981-10-23 | Canon Inc | Amorphous silicon thin film transistor and manufacture thereof |
| JPS5769778A (en) * | 1980-10-17 | 1982-04-28 | Matsushita Electric Ind Co Ltd | Semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS59115561A (en) | 1984-07-04 |
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