JPS63308384A - Thin film transistor - Google Patents

Abstract

PURPOSE:To prevent a metallic material from diffusing in a contact layer as well as an off current from changing due to annealing process by a method wherein a drain electrode and a second electrode are laminated-layer structured comprising a metallic layer, an insulating thin film and a contact layer. CONSTITUTION:In order to restrain an off current from being increased by metallic diffusion, a very thin insulating film layer (film thickness of 1-5nm) 7 is provided between ohmic electrodes of an n<+> layer 4 and a metallic layer 5 to prevent a metal from diffusing in the n<+>Si layer 4. As for such a metallic diffusion preventive layer, an insulating layer with high diffusion preventive capacity such as SiN, PSG etc., is used. Through these procedures, a stable off current regardless of annealing temperature can be supplied to be reduced by around three figures compared with any conventional type after annealing process at 300 deg.C so that the characteristics of a liquid crystal driving thin film transistor may be improved.

Description

[Detailed Description of the Invention] [Summary] The present invention provides a drain electrode and a source electrode of an insulated gate thin film transistor with a laminated structure of a metal layer, an insulator thin layer, and a contact layer. This prevents the off-state current from changing due to annealing.

[Industrial application field]

The present invention relates to a thin film transistor (TPT) for driving a liquid crystal.

[Conventional technology]

TPT-driven liquid crystal displays are popular for portable TVs because of their large capacity and high quality display.

It has come to be put into practical use in various fields, such as for office automation terminals.

TPT switches the liquid crystal by utilizing a change in conductance of 5 to 7 orders of magnitude depending on the gate voltage, but it is necessary to obtain a sufficiently high resistance in the off state. However, it is difficult to control the off-current with good reproducibility;
Especially when heat treatment is applied during the manufacturing process, the source
The metal of the drain electrode material diffuses, resulting in an increase in off-state current.

FIG. 3 shows the change in off-state current due to annealing of a conventional TPT, that is, the drain current vs. gate voltage V6. FIG. 3 is a diagram showing the dependence of characteristics on annealing temperature. As seen in the figure, the higher the annealing temperature, the greater the increase in off-state current.

FIG. 4 is a sectional view of a main part showing the structure of a conventional TPT.

In conventional TPT, a gate electrode 6 made of Ti (titanium) or the like is formed on an insulating substrate 1, 5iN (silicon nitride) N2 is formed as a gate insulating film covering this, and a semiconductor layer is formed on top of the gate electrode 6. -3i13. An n''Si layer 4 as a contact layer and a metal layer 5 such as Af as a drain and source electrode material are laminated.

In the L structure, the ohmic contact portion is an a-3i (amorphous silicon) layer 3. Since it has a laminated structure of n' SiN4° metal layer 5, the material of metal layer 5 changes to n' by heat treatment.
When it diffuses into the "Si layer 4" and reaches the interface between the a-3i layer 3 and the "n" Si layer 4, a current bus is created for the holes and the TPT
The off-state current increases. The amount of metal diffusion increases with the annealing temperature, and the hole current increases as the annealing temperature increases, so as shown in FIG. 3, the higher the annealing temperature, the more the off-state current increases.

[Problem that the invention seeks to solve]

In the TPT manufacturing process, heat treatment at about 300°C is essential, so the TPT structure that does not increase off-state current by annealing at about 300°C is TP.
There is a strong demand for a method for producing T.

Therefore, an object of the present invention is to prevent an increase in off-state current due to heat treatment at about 300°C.

[Means for solving the problem] In the present invention, in order to suppress the increase in off-current due to the above-mentioned metal diffusion, a very thin insulating film is provided between the n''Si layer and the metal layer of the ohmic electrode. N (film thickness 1-5 nm)
is provided to prevent metal diffusion into the nSiN. As such a metal diffusion prevention layer, SiN,
An insulating layer with diffusion blocking ability such as PSG is used.

[For production]

The current-voltage characteristics of an insulating film generally exhibit nonlinearity, and when the film is particularly thin, current flows by tunneling, so it is possible to obtain a current of about 1 μA at a low voltage (0.2 V). When the TPT is off, the channel has a high resistance, so the drain voltage VD is almost applied to the channel, but when the TPT is on, the channel has a low resistance and the vo
is almost applied to the insulating film of the source/drain electrodes, and a current flows through the thin insulating film by tunneling, so that the resistance between the source and drain becomes small and the on state can be maintained.

The thicker the insulating film in the source/drain electrode portion is, the higher the ability to prevent metal diffusion, but if the insulating film is 5 nm or more thick, it becomes difficult for tunnel current to flow.

Therefore, the thickness of the insulating film needs to be less than this.

〔Example〕

FIG. 1 shows a sectional view of a TPT according to an embodiment of the present invention.

First, Ti (titanium) is formed to a thickness of about 70 nm on an insulating substrate 1 such as a glass substrate by a seed beam evaporation method, and then patterned by a photolithography process to form a gate electrode 6.

Next, 5i was formed using P-CVD (plasma chemical vapor deposition) method.
N (silicon nitride) layer 2 is approximately 200 nm thick.

The a-3i (amorphous silicon) layer 3 has a thickness of about 1100 nm.

n″Stb Con) Layer 7 is deposited to a thickness of about 3 nm in the same vacuum.

The pressure and power conditions, as well as the reaction gas and its flow rate when forming each film, were 0.2 Torr for the SiN layer 2.

200 W, S i H4/NH3 are each 5
0Sccm.

a-3i layer 3 is 0.7 Torr, 50W, SiH
4 is 250Sccm, n”Si layer 4 is I Tor
r, 50W, S i H4/PH, are each 15
0/150 Sccm, S i Oz layer 7 is 0.15
Torr, 50W, and S i Ha /N20 are each 15 Sccm/75 Sccm.

Subsequently, a metal layer 5 is formed by depositing 1M (aluminum) or the like using an electron beam evaporation method, and then patterning is performed using a photolithography process to form a metal layer 5°S ioz N7.
．． Etch the n'' S 1 layer 4 to form a 108m channel 8.

FIG. 2 shows the relationship between the off-state current and annealing temperature of the TPT thus formed. The white circles in the figure indicate the off-state current of the TPT obtained in Example L, and the black circles indicate the off-state current of the TPT obtained in Example L.
This figure shows the change in the off-state current of T, and is included for comparison with the present invention. As is clear from the figure, the TFT of this example has a constant off-state current that does not change depending on the annealing temperature, and after the 300°C heat treatment that is essential in the process, the off-state current is three orders of magnitude higher than that of the conventional type. can be reduced, and the characteristics of TPT are greatly improved.

In the above embodiment, an example was described in which a Si20 layer was used as the insulating thin layer 7 for preventing metal diffusion, but a SiN layer may be used instead.

Further, the thickness of the insulating thin layer 7 must be such that a tunnel effect occurs, and as is well known, it must be extremely thin. In order to carry out the present invention, it is necessary that this thickness be approximately 5 nm or less. On the other hand, if it is made too thin, it will not be possible to form a uniform film, and in practical terms
It is necessary to make it γ.

〔Effect of the invention〕

As explained above, according to the present invention, a stable off-state current can be obtained regardless of the annealing temperature, and after annealing at 300°C, the off-state current can be reduced by about three orders of magnitude compared to the conventional type.
The characteristics of PT are improved.

[Brief explanation of drawings]

Fig. 1 is a cross-sectional view of the main part showing the structure of a TPT according to an embodiment of the present invention, Fig. 2 is a diagram showing the annealing temperature dependence of the off-state current of the above embodiment, and Fig. 3 is a diagram showing the annealing temperature of a conventional TPT. FIG. 4 is a diagram showing changes in off-state current, and is an explanatory diagram of the structure of a conventional TPT. In the figure, 1 is an insulating substrate, 2 is a SiN layer, and 3 is a-
3ijii, 4 is an n"si layer, 5 is a metal layer, 6 is a gate electrode, and 7 is an insulating thin N (S i Ox ) layer. uEIH4#: 14TFT4 Ntffim Figure 1 Row-Saif e;mu721 [sword C
Tomari 511 Figure 2

Claims (1)

[Claims] A contact layer (4) and a metal layer (5) are provided on the surface of the semiconductor layer (3).
), the insulated gate thin film transistor having a drain electrode and a source electrode stacked together, characterized in that an insulating thin layer (7) is interposed between the contact layer (4) and the metal layer (5). thin film transistor.