JPH0277159A - Thin film semiconductor element - Google Patents

Abstract

PURPOSE:To restrain the photocarriers from being produced by a method wherein at least two kinds of elements belonging to the IV group and at least one kind of element belonging to the V group in the periodic table are contained in an ohmic contact layer. CONSTITUTION:At least two kinds of elements belonging to the IV group and at least one kind of element belonging to the V group in the periodic table excluding silicon atoms are contained in an ohmic contact layer 21 near an amorphous silicon layer 20 most easily producing photocarriers during photoirradiating process. Thus, this ohmic contact layer 21 becomes a layer in narrow optical band gap and low photosensitivity to any visible light so that any scattering light may be absorbed into the ohmic contact layer 21 to restrain the photocarriers from being produced. Furthermore, the parts of the amorphous silicon layer 20 excluding the channel part can be formed thinner than the channel part, thereby restraining the photocarriers themselves from being produced in the amorphous silicon layer 20.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a thin film semiconductor device, more specifically a thin film semiconductor device including an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, For example, it relates to those applied to active matrix drive type flat panel displays.

As information technology advances in recent years, even higher definition and brightness are desired in the field of displays for displaying images. Currently, CRTs (cathode ray tubes) are the mainstream in most household and other fields. However, there is an increasing demand for flat panel displays that are small, lightweight, consume low power, and can provide high image quality. Among flat panel displays, LCDs using liquid crystals are currently the most widely used displays and have a high future potential.The driving methods for this LCD include a simple matrix drive method and an active matrix drive method. The method is to arrange a switch element for each pixel and drive and control each pixel independently.Therefore, each pixel has 100
It is possible to drive at a duty ratio close to %, and it is possible to obtain a large pixel contrast ratio.

A thin film transistor (TPT) type switching element using amorphous silicon can be made in a large area and can be manufactured at low cost, so it is viewed as promising and has been studied extensively. Characteristics of thin film transistor (TPT) displays using amorphous silicon include the possibility of large-area displays and the relatively low-temperature process (30
Since it can be manufactured at a temperature of around 0° C., an inexpensive glass substrate can be used, and continuous film formation maintains the cleanliness of the film interface.

Based on the above, thin film transistor (TPT) type displays employing an active matrix drive method and using amorphous silicon are expected to develop as candidates for future new media displays.

Next, the conventional amorphous silicon thin film semiconductor device (TP
The structure of T) is shown in FIG.

A gate electrode 12 is patterned on the upper surface of the glass substrate 11 (upper side in FIG. 4), and a gate insulating film 13 is laminated on the upper surface of the gate electrode 12. Furthermore, an amorphous silicon layer 14 is laminated on the upper surface of this gate insulating film 13, and a 00 amorphous silicon layer 15 as an ohmic contact layer is laminated on the upper surface of this amorphous silicon layer 14. A drain electrode 16 is further laminated on the upper surface of the n' amorphous silicon layer I5, and a source electrode 17 is formed at a predetermined location horizontally opposite the drain electrode 16 with the gate electrode 12 in between. Further, a protective film 18 is formed between the drain electrode 16 and the source electrode 17. Here, the n1 amorphous silicon layer 15 as an ohmic contact layer quickly transports electrons induced in the channel portion on the gate electrode 12 to the source electrode 17 or the drain electrode 16, and the flow of holes accumulated in the channel portion ( 6, which has the function of blocking off-state current (off-state current) and reducing leakage current.
φ The amorphous silicon layer 14 of amorphous silicon TPT as described above is a good photoconductor for visible light, and TFTLC using amorphous silicon TPT
In D, since a backlight is used, this backlight excites the amorphous silicon layer 14 and generates carriers, thereby increasing the drain current (off current) when the gate voltage is applied. When the off-state current increases, TP
The on-off ratio of T decreases, resulting in deterioration of the display characteristics of the LCD. That is, amorphous silicon TFT
In LCDs, characters or images are displayed by applying a charge to the liquid crystal layer for a certain period of time. However, if the off-state current is large, this acts as a leakage current and drains the signal charge accumulated in the liquid crystal layer for a certain period of time. It becomes impossible to maintain the image, and the contrast ratio and image stability deteriorate significantly. Therefore, in order to obtain good display characteristics with a high contrast ratio, it is important to create an amorphous silicon TPT with stable characteristics and low off-current due to photocarriers during backlight irradiation.

The present invention is a thin film semiconductor device invented in view of the above problems, which includes an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, the ohmic contact layer being made of an element. At least two elements belonging to Group IV of the periodic table and Group V
It is characterized by containing at least one element belonging to the group.

Further, there is provided a thin film semiconductor device including an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, wherein the ohmic contact layer is made of at least two elements belonging to Group IV of the periodic table of elements and an element belonging to Group V of the periodic table. The first semiconductor layer is characterized in that the semiconductor layer contains at least one element belonging to the above group, and that the thickness of the portion of the first two semiconductor layers other than the channel portion is thinner than the thickness of the channel portion.

When we irradiated an amorphous silicon TPT with backlight and measured the off-current characteristics based on the generation of optical carriers, we found that the off-current during light irradiation is between the gate electrode 12 and the drain electrode 16 or between the gate electrode 12 and the source electrode 17. It was found that the overlap increases in proportion to the width of the overlap between them. That is, photocarriers mainly exist between the gate electrode 12 and the drain electrode 16 or between the gate electrode 12 and the source electrode 17.
It is thought that this phenomenon occurs within the amorphous silicon layer 14 at the junction between the drain electrode I6 and the source electrode 17, and drifts due to the electric field between the drain electrode I6 and the source electrode 17.

Therefore, in the present invention, in order to prevent the generation of photocarriers in the vicinity of the n3 amorphous silicon layer (ohmic contact layer) where photocarriers are most likely to be generated during light irradiation and to absorb scattered light, an element is added to the ohmic contact layer. At least two elements belonging to Group IV of the periodic table and at least one element belonging to Group V
persimmon, or the ohmic contact layer contains at least two elements belonging to Group IV of the periodic table of elements.
A thin film semiconductor containing at least one species and an element belonging to Group V, and in which the thickness of a portion of the semiconductor layer other than the channel portion is thinner than the thickness of the channel portion is formed. .

The structure of the thin film semiconductor device according to the present invention will be explained in detail below.

Note that parts having the same structure as those of the conventional example are given the same reference numerals.

A gate electrode 12 is patterned on the upper surface of the glass substrate 11 (upper side in FIG. 1). This gate electrode 12 is made of Cr, Mo, Ta, Al, N1crllll, or a laminated film of these. This gate electrode 1
The thickness of 2 is determined by the film material, the structure of the target TPT, the wiring resistance, etc., but in the present invention, the thickness of 3
It is determined in the range of 00 to 3000A, more preferably 500 to 1500 people.

A gate insulating film 13 is laminated on the upper surface of the gate electrode 12 . As the gate insulating film 13, a thin film having a high resistivity, excellent insulation properties, high breakdown voltage, and good interface properties is used.

In the present invention, the gate insulator 1113 that satisfies these conditions is a SiN film, SiO film, or 5iON film formed by plasma CVD (glow discharge decomposition method), or Ta2O, 1II1. An Al2O3 film or a laminated film of these can be used. When using, for example, a SiN film as the gate insulating film 13, a silane-based gas such as a mixed gas of Sr)I4 and NHs or N2 is used.
It can be formed by decomposing and depositing a mixed gas of S i H4, NH, and N2 using a plasma CVD method. When using 5iNll, the substrate temperature has a large effect on the film properties, so it is preferable that the substrate temperature is usually 250°C or higher, more preferably 300°C or higher. The number is determined in order to obtain the desired TPT characteristics, but usually 500 to 5,000 people are desirable, and more preferably 1,000 to 3,000 people.

An amorphous silicon layer 2 is formed on the upper surface of the gate insulating film 13.
0 are laminated. Amorphous silicon layer 20
is a semiconductor layer, and can be easily formed using a silane-based gas by a normal plasma CVD method. This amorphous silicon layer 20 is formed to be thinner than the thickness of the channel portion below the ohmic contact layer (lower amorphous silicon layer) 21, which will be described later, in order to reduce the generation of photocurrent during light irradiation. The thickness is preferably 500 Å or less, more preferably 300 Å or less.

The thickness of the channel portion of the amorphous silicon layer 20 is T
In the present invention, usually 100 to 3000 people are employed, and more preferably 200 to 1000 people. In order to obtain good film properties, the temperature is preferably 100°C to 400°C, more preferably 200°C to 300°C.

On the upper surface of the amorphous silicon layer 20, an n0 amorphous silicon:60 layer 21 is laminated as an ohmic contact layer.

This n9 amorphous silicon bi-Ge layer 21 is formed for the purpose of facilitating the movement of electrons, which are carriers, and blocking the flow of holes. Furthermore, it also has the role of absorbing light during backlight illumination and preventing light scattering. This n0 amorphous silicon two-Ge layer 21 is mainly formed of a mixed gas of a silane-based gas such as S i Ha, a Ge-containing gas such as G e H4, and further a doping gas PH1. As for the electrical characteristics of the n° amorphous silicon: 60 layer 21, it is desirable that the dark specific resistance is 10'Ω·cm to 10Ω·Cl11, more preferably 10'Ω·cm to 10
It is in the range of 2Ω·cm. The activation energy is preferably in the range of 0.4 eV to 0.1 eV, more preferably in the range of 0.3 eV to 0.2 eV. The thickness of the n0 amorphous silicon=Ge layer 21 needs to be determined appropriately to prevent peeling of the film, but it is usually 1.
00 to 2000 people, more preferably 2
The number ranges from 00 to 1000 people.

Further, the Ge content in the n'''' amorphous silicon=Ge layer 21 is desirably from 10 atom % to 70 atom %, more preferably from 20 atom % to 40 atom %. Furthermore, the optical bandgap is 1.6eV
or 1. A range of OeV (775 mm to 1200 mm) is desirable, more preferably 1.5 eV to 1.5 eV.
A range of 1 eV (830 mm to 1100 mm) is desirable.

When forming the 60-layer 21 film, better characteristics can be obtained when the substrate temperature in the plasma CVD apparatus is higher; however, in the present invention, damage to the base film and temperature restrictions during the process 100 considering etc.
The temperature range is preferably from 120°C to 400°C, more preferably from 120°C to 300°C.

As the element to be mixed into the amorphous silicon, in addition to the above-mentioned Ge, an element of Group IV in the periodic table of elements, such as Sn, can be used.

The n′″ amorphous silicon; GeJ!21+7)
A drain electrode 16 is further laminated on the upper surface in FIG. 1, and a source electrode 17 is formed at a predetermined location horizontally opposite to this drain electrode 16 with the gate electrode 12 in between.

The characteristics of the drain electrode 16 and the source electrode 17 are usually stabilized by forming a layered structure of a high melting point metal and At, for example, Cr/AI, Mo/A.
I, T i/A 1, etc. are used.

The film thickness of the high-melting point metal is 1, taking into account peeling of the film.
It is desirable to set the number between 00 and 1000 people, and more preferably between 10OA and 500 people.
Further, the thickness of AI is preferably about 1 μm.

A protective film 18 is formed on the upper surface of the channel portion of the amorphous silicon layer 20, and this protective film 18 is formed for the purpose of preventing the TPT in the channel portion from deteriorating due to moisture or contamination.

Usually, a SiN film produced by plasma CVD method is used. The method for forming the protective film 18 is based on the SiN of the gate insulating film 13 described above.
It is made in the same way as the film, and the film thickness is 500 to 50.
The range is preferably 00, more preferably 1.
The number ranges from 000 to 3000 people.

■ In the thin film semiconductor device of the present invention, the amorphous silicon layer 2 is the most likely to generate photocarriers when irradiated with light.
In addition to silicon atoms, at least one element belonging to Group IV of the periodic table is added to the ohmic contact layer 21 near zero.
By containing a species and at least one element belonging to Group V of the periodic table, this ohmic contact layer 21 becomes a layer with a narrow optical band gap and low photosensitivity to visible light, and the scattered light is It is absorbed by the ohmic contact layer 21 and has the effect of suppressing the generation of optical carriers.

In addition, since the thickness of the amorphous silicon l1J20 other than the channel part is formed thinner than the thickness of the channel part, the generation of photocarriers is proportional to the thickness of the amorphous silicon layer 20. This has the effect of suppressing the generation of optical carriers themselves within the layer 20.

Husband Examples according to the present invention will be described below.

Cr for the gate electrode 12 was deposited by 1200 people on a thoroughly cleaned 5-inch square glass substrate 11, and then a pattern for the gate electrode 12 was formed by photoetching. T
The channel length as a PT was 811 m, and the channel width was 100 μm. Thereafter, the glass substrate 11 was set in a plasma CVD apparatus, and while the inside of the vacuum container was evacuated, the glass substrate 11 was heated, and the heating temperature was set at 300°C. When the degree of vacuum inside the vacuum container becomes 10-'Torr or less, the exhaust system is switched from the diffusion pump (DP) to the mechanical booster pump (MBP) and the vacuum is changed to 10-'Torr through the mass flow controller (MFC).
IOSCCM of %SiHa and 50SCCM of NH were flowed, and the reaction pressure was adjusted to 0.5 Torr. 13.56 M when the pressure becomes constant
A SiN gate insulating film 13 was formed by applying an RF power of 50 W for 20 minutes. The gate insulating film 13 thus formed had a refractive index of 1.81 and an optical band gap (Eg) of 5. leV, relative permittivity is 6.
It was 1. The film thickness was 3000 people.

Next, in the same plasma CVD apparatus, one semiconductor layer of an amorphous silicon layer 20 is formed on the SiN gate insulating film 13.
200 people were formed. Formation conditions are 100% SiH4 with IO
RF power 100W at 5ccM, reaction pressure 02Torr
And so. The film forming time was 10 minutes. The amorphous silicon layer 20 formed in the above manner has electrical properties such as dark specific resistance ρd=1×10”Ω·cm, activation energy Ea=0.7 eV, and optical properties such as 12 and optical band gap E g = 1.75eV.

Thereafter, the glass substrate 11 is taken out of the plasma CVD apparatus, and by photoetching, the entire channel portion is left and the other portions, that is, the portions below the source electrode 17 and the drain electrode 16, are made of the amorphous silicon layer 20.
Only 200 people remained.

After photo-etching, the glass substrate 11 was placed in the CvD apparatus again, the substrate temperature was set at 250° C., and the n0 amorphous silicon two-Ge layer 21 was formed. The formation conditions were 100% S i H4 at 1105 CC, 10% H, base Ge Ha at 50 SCCM, 1% H2 base PH, IO at 5 ccM, and the reaction pressure was 0.2.
Open film formation was performed for 10 minutes at Torr and RF power of 100 W. The film thickness is n1 amorphous silicon formed as above 0 determined by 1000 people; the characteristics of the 60 layer 21 are ρd=2X I O3Ω・cm, activation energy Ea
= 0.15eV, and the optical property was that the optical bandgap Eg was 1.3eV.

Further, the Ge content was 30 at%.

After forming the thin film using the CVD device, the glass substrate 11
was set in a vacuum evaporation apparatus, and 300 Cr layers, which would become the drain electrode 16 and the source electrode 17, were formed by tungsten port heating. Next, the above sample was photoetched to etch the Cr at the top of the channel with acid.
Further, the n0 amorphous silicon; 60 layer 21 and the amorphous silicon layer 20 are HF:HNO,:CH3C.
Etching was performed using O0HU solution. After removing and cleaning the resist, the glass substrate 11 is again set in the vacuum evaporation apparatus, and AI is applied to the entire surface of the sample by heating in a tungsten boat.
A thickness of 0 μm was formed. Thereafter, At in the upper part of the channel was removed by photoetching again using a phosphoric acid-based aqueous solution.

Amorphous silicon TFT created as above
The electrical characteristics of the array were evaluated and were as follows.

Initial characteristic field effect mobility 0.4 cm2/V·sec Threshold voltage 1.5v On-current Vg: 2xlO-'A at 15V Next, the results of off-current during backlight irradiation are shown.

At a backlight illuminance of 2000 lux, Vg=OV, V
When d=lOV lXl0-”AVg=-10V, Vd
= 8XIO-”A at lOV and Vg-I d characteristics as second
As shown in the figure.

As described above, good on-off characteristics were exhibited even when irradiated with backlight.

Comparison 1 1200 people formed a semiconductor layer of an amorphous silicon layer on a SiN gate insulating film 13 in a plasma CVD apparatus. This layer was not photo-etched, and the channel portion and other portions, ie, the portions below the source electrode 17 and drain electrode 16, were left as they were.

A normal ohmic contact layer 15 containing no Ge was formed on top of this. This ohmic contact layer 15
The formation conditions are 100% SiH4, 1105CC, 1%H
, 205 CCM of base PHs were flowed, and the gate electrode was formed for 5 minutes at a reaction pressure of 0.2 Torr and an RF power of too much. The thickness of the ohmic contact layer 15 was determined to be 0 or more by 500 people.The characteristics of the ohmic contact layer 15 formed as described above are ρd=2xlo''Ω・cm, activation energy E
a=0.2 eV.

Amorphous silicon TPT was formed under all other conditions the same as those of the above-mentioned example.

The electrical characteristics of this comparative example are shown below.

Initial field effect mobility 0.5cm2/V-sec Threshold voltage! , 5 V On-current when Vg=15V 2xlO-'A Next, the results of the off-current during backlight irradiation are shown.

At a backlight illuminance of 2000 lux, Vg=OV, V
When d=lOV lXl0-'AVg=-10V, V
When d=10V, 3xlO-'A and Vg-Id characteristics are shown in FIG.

As described above, the off-state current during backlight irradiation is extremely large, and it is observed that the on-off characteristics are significantly degraded.

As is clear from the above description, the thin film semiconductor device according to the present invention includes an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, and the ohmic contact layer is made of an element. Because it contains at least two elements belonging to Group IV of the periodic table and at least one element belonging to Group V, the ohmic layer near the amorphous silicon layer where photocarriers are most likely to be generated during light irradiation. The contact layer has a narrow optical bandgap and low photosensitivity to visible light, and scattered light is absorbed by the ohmic contact layer, suppressing the generation of photocarriers.

Therefore, it is possible to form a thin film semiconductor element having good on-off characteristics even during back irradiation.

In addition, the ohmic contact layer contains at least two elements belonging to Group IV of the periodic table of elements and at least one element belonging to Group V, and the thickness of the semiconductor layer other than the channel portion is Since the amorphous silicon layer is formed thinner than the thickness of the channel, the generation of photocarriers is proportional to the thickness of the amorphous silicon layer, and the effect is to suppress the generation of photocarriers themselves generated within this amorphous silicon layer. Therefore, with such a structure, it is possible to form a thin film semiconductor element having even better on-off characteristics even during back irradiation.

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view showing an example of a thin film semiconductor device according to the present invention, FIG. 2 is a diagram showing Vg-Id characteristics, FIG. 3 is a diagram showing Vg-Id characteristics in a comparative example, and FIG. 4 is a diagram showing Vg-Id characteristics in a comparative example. is a sectional view showing a conventional example. 13... Gate insulating film (amorphous insulating layer), 20
...Amorphous silicon layer (semiconductor layer), 21...
・N4 amorphous silicon; Ge layer C ohmic contact layer) Figure 1 Figure 4 Figure 2 Vg (I

Claims (2)

[Claims] (1) A thin film semiconductor device including an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, wherein the ohmic contact layer is made of at least two kinds of elements belonging to Group IV of the periodic table of elements and A thin film semiconductor device characterized by containing at least one element belonging to Group V. (2) A thin film semiconductor device including an amorphous insulating layer, a semiconductor layer made of amorphous silicon, and an ohmic contact layer, wherein the ohmic contact layer is made of at least two kinds of elements belonging to Group IV of the periodic table of elements and 1. A thin film semiconductor device containing at least one element belonging to Group V, and characterized in that a portion of the semiconductor layer other than a channel portion is formed thinner than a thickness of the channel portion.